Philips Semiconductors
DECT burst mode controller
Objective specification
PCD5043
8 CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX.
Tamb
VDD
VDD(ret)
IDD
IDD(stb)
operating ambient temperature
−25
supply voltage
2.7
RAM retention voltage
1.0
operating supply current
note 1
−
standby supply current
note 2
−
clock input duty cycle
All inputs LOW except WRN; 45
XTAL1 running at 14 MHz
−
+70
−
5.5
−
VDD
6
12
1
3
−
55
Digital I/O
VIL
VOL
VIH
VOH
ILI
IO(source)
IO(sink)
IRDYN(sink)
LOW level input voltage
LOW level output voltage
HIGH level input voltage
HIGH level output voltage
input leakage current
output source current
output sink current
RDYN output sink current
fDCK
DCK input frequency
fFS1
FS1 input frequency
Oscillator (inputs XTAL1 and XTAL2)
VDD = 3.6 V;
0.4 V ≤VO ≤ VDD − 0.4 V
VDD = 3.6 V;
0.4 V ≤VO ≤ VDD − 0.4 V
VDD = 3.6 V; VO = 0.4 V
VDD = 5.0 V; VO = 0.4 V
n = 1 to 32
0
−
0
−
0.7VDD −
0.7VDD −
2.0
5.0
0.3VDD
0.3VDD
VDD
VDD
1.0
−
2.0
5.0 −
2.0
5.0 −
−
6.0 −
−
n × 64 −
−
8
−
gm
transconductance
VDD = 2.7 V
VDD = 3.6 V
RF
feedback resistance
0.6
−
−
−
1.6 −
200
500
RSSI Peak detector (6-bit linear A-D converter, for RSSI measurement on input RSSI_AN)
Vi(RSSI_AN)
input level
Vconv(RSSI_AN) voltage conversion range
Vi(VREF)
VREF input voltage
Zi(VREF)
VREF input impedance
tconv
Zi(RSSI_AN)
conversion time
integral non-linearity
differential non-linearity
input impedance RSSI_AN
during power-down high
impedance
note 3
0
0
1.0
−
18.4
−
−
−
−
VDD
−
VREF
3.0 VDD
50 −
−
−
−
4
0.2 1.5
1
−
Notes to the characteristics
1. VDD = 3.0 V; fclk =13.824 MHz; no external load; one speech link active (under typical conditions).
2. VDD = 3.0 V; fclk =13.824 MHz; no external load; after reset.
3. Maximum differential non-linearity at supply voltage 5.5 V and VREF = 1 V.
UNIT
°C
V
V
mA
mA
%
V
V
V
V
µA
mA
mA
mA
mA
kHz
kHz
mS
mS
kΩ
V
V
V
kΩ
µs
LSB
LSB
MΩ
1996 Oct 31
17