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HI5675(1999) 데이터 시트보기 (PDF) - Intersil

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상세내역
제조사
HI5675
(Rev.:1999)
Intersil
Intersil Intersil
HI5675 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
HI5675
Absolute Maximum Ratings
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
Reference Voltage, VRT, VRB . . . . . . . . . . . . . . . . . . . . VDD to VSS
Analog Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . VDD to VSS
Digital Input Voltage, CLK . . . . . . . . . . . . . . . . . . . . . . . VDD to VSS
Digital Output Voltage, VOH, VOL. . . . . . . . . . . . . . . . . . VDD to VSS
Operating Conditions (Note 1)
Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Supply Voltage
AVDD, AVSS, DVDD, DVSS . . . . . . . . . . . . . . . . +4.75V to +5.25V
|DGND-AGND|. . . . . . . . . . . . . . . . . . . . . . . . . . . . 0mV to 100mV
Reference Input Voltage
VRB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V and Above
VRT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.8V and Below
Analog Input Range, VIN . . . . . . . VRB to VRT (1.8VP-P to 2.8VP-P)
Clock Pulse Width
tPW1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns (Min)
tPW0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns (Min)
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
98
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum
Maximum
Storage Temperature Range,
Lead Temperature (Soldering
TSTG
10s) .
.
.
.
.
.
.
.
.
-65oC to
.......
150oC
300oC
(SOIC - Lead Tips Only)
Die Characteristics
Die Size: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.23 x 2.24mm
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications fC = 20MSPS, AVDD = DVDD = 5V, VRB = 0.5V, VRT = 2.5V, TA = 25oC (Note 1)
PARAMETER
TEST CONDITIONS
MIN
TYP
SYSTEM PERFORMANCE
Offset Voltage
EOT
EOB
Integral Non-Linearity, INL
Differential Non-Linearity, DNL
DYNAMIC CHARACTERISTICS
fC = 20MSPS, VIN = 0.6V to 2.6V
fC = 20MSPS, VIN = 0.6V to 2.6V
-60
-35
0
+15
-
±0.5
-
±0.3
Effective Number of Bits, ENOB
Spurious Free Dynamic Range
Signal to Noise Ratio, SINAD
= R-----M-----S------N--R--o--M-i--s--S-e----+-S----iD-g---n-i--s-a--t-l-o----r---t--i--o---n--
fIN = 1MHz
fIN = 1MHz
fC = 20MHz, fIN = 1MHz
fC = 20MHz, fIN = 3.58MHz
-
7.6
-
51
-
46
-
46
MAX
-10
+45
±1.3
±0.5
-
-
-
-
UNIT
mV
mV
LSB
LSB
Bits
dB
dB
dB
Maximum Conversion Speed, fC
Minimum Conversion Speed
Differential Gain Error, DG
Differential Phase Error, DP
Aperture Jitter, tAJ
Sampling Delay, tDS
Data Latency, tLAT
ANALOG INPUTS
Analog Input Bandwidth (-1dB), BW
Analog Input Capacitance, CIN
VIN = 0.6V to 2.6V, fIN = 1kHz Ramp
NTSC 40 IRE Mod Ramp, fC = 14.3MSPS
VIN = 1.5V + 0.07VRMS
20
-
-
MSPS
-
-
0.5
MSPS
-
1.0
-
%
-
0.5
-
Degree
-
30
-
ps
-
4
-
ns
-
-
2.5 Cycles
-
18
-
MHz
-
11
-
pF
4

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