E28F008BV-B70 데이터 시트보기 (PDF) - Intel
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E28F008BV-B70 Datasheet PDF : 58 Pages
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E
8-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
Code
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Table 6. Command Codes and Descriptions (Continued)
Device Mode
Description
Clear Status The WSM can only set the program status and erase status bits in the status
Register
register to “1,” it cannot clear them to “0.”
The status register operates in this fashion for two reasons. The first is to give
the host CPU the flexibility to read the status bits at any time. Second, when
programming a string of bytes, a single status register query after programming
the string may be more efficient, since it will return the accumulated error status
of the entire string. See Section 3.3.2.1.
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Intelligent Puts the device into the intelligent identifier read mode, so that reading the
Identifier
device will output the manufacturer and device codes. (A0 = 0 for manufacturer,
A0 = 1 for device, all other address inputs are ignored). See Section 3.2.2.
Command
Read Array
Intelligent Identifier
Read Status Register
Clear Status Register
Word/Byte Program
Alternate Word/Byte Program
Block Erase/Confirm
Erase Suspend
Erase Resume
Table 7. Command Bus Definitions
First Bus Cycle
Note Oper Addr Data
8
Write
X
FFH
1
Write
X
90H
2,4 Write
X
70H
3
Write
X
50H
Write
PA
40H
6,7 Write
PA
10H
6,7 Write
BA
20H
5
Write
X
B0H
5
Write
X
D0H
Second Bus Cycle
Oper
Addr
Data
Read
IA
Read
X
IID
SRD
Write
PA
Write
PA
Write
BA
PD
PD
D0H
ADDRESS
BA= Block Address
IA= Identifier Address
PA= Program Address
X= Don’t Care
DATA
SRD= Status Register Data
IID= Identifier Data
PD= Program Data
NOTES:
1. Bus operations are defined in Tables 3 and 4.
2. IA = Identifier Address: A0 = 0 for manufacturer code, A0 = 1 for device code.
3. SRD - Data read from status register.
4. IID = Intelligent Identifier Data. Following the Intelligent Identifier command, two read operations access manufacturer and
device codes.
5. BA = Address within the block being erased.
6. PA = Address to be programmed. PD = Data to be programmed at location PA.
7. Either 40H or 10H commands is valid.
8. When writing commands to the device, the upper data bus [DQ8–DQ15] = X (28F800 only) which is either VIL or VIH, to
minimize current draw.
SEE NEW DESIGN RECOMMENDATIONS
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