RT8855 데이터 시트보기 (PDF) - Richtek Technology
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RT8855 Datasheet PDF : 18 Pages
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RT8855
CORE Section- Differential Output Voltage Sensing
The RT8855 uses differential voltage sensing by a high
gain low offset ErrorAmp as shown in Figure 7. Connect
the negative on-die CPU remote sense pin to FBRTN.
Connect the positive on-die remote sense pin to FB with
a resistor (RFB) The ErrorAmp compares EAP
( = VDAC − VADJ) with the VFB to regulate the output voltage.
C2
CFB
R1 C1
VCCP
RFB FB
(Positive remote
sense pin of CPU)
IOFSN
IOFSP
-
EA
COMP
+
(Negative remote
sense pin of CPU)
VCCN
RADJ
+ +- EAP
VDAC
-
FBRTN
ADJ
Figure 7. Circuit for VCORE Differential Sensing and No
load Offest.
CORE Section- No-Load Offset
In Figure 7, IOFSP and IOFSN are used to generate no-load
offset. Either IOFSP or IOFSN is active during normal operation.
Connect a resistor from OFS pin to GND to activate IOFSN.
IOFSN flows through RFB from FB pin to VCCP. In this case,
negative no-load offset voltage (VOFSN) is generated.
Connect a resistor from OFS pin to 5VCC to activate IOFSP.
IOFSP flows through RFB from the VCCP to FB pin. In this
case, positive no-load offset voltage (VOFSP) is generated.
Beside IOFSN and IOFSP, the RT8855 generates another DC
current for initial no-load negative offset. A DC current
source will continuously inject typical 9uA current into
the resistors connected to ADJ pin, Therefore, the effect
of this 9uA current source and ADJ resistors should
counted into the calculation of no-load offset :
VOFSN = IOFSN ×RFB + 9u×RADJ
=
0.4 × RFB
ROFS
+ 9u×RADJ
VOFSP = IOFSP ×RFB − 9u×RADJ
=
0.4
×
RFB
ROFS
− 9u×RADJ
CORE Section- Programmable Load-line
Output current of CSA is summed and averaged in
RT8855. Then 0.5Σ (IX[n]) is sent to ADJ pin. Because
Σ IX[n] is a PTC (Positive Temperature Coefficient) current,
an NTC (Negative Temperature Coefficient) resistor is
needed to connect ADJ pin to GND. If the NTC resistor is
properly selected to compensate the temperature
coefficient of IX[n], the voltage on ADJ pin will be
proportional to IOUT without temperature effect. In RT8855,
the positive input of ErrorAmp is “VDAC − VADJ”. VOUT will
follow “VDAC − VADJ”, too. Thus, the output voltage
decreasing linearly with IOUT is obtained. The loadline is
defined as :
LL(loadline) =
ΔVOUT
ΔIOUT
=
ΔVADJ
ΔIOUT
=
1
2
×
DCR
×
RADJ
RCSN
Briefly, the resistance of RADJ sets the resistance of
loadline. The temperature coefficient of RADJ compensates
the temperature effect of loadline.
CORE Section- Load Transient Quick Response
In steady state, the voltage of VFB is controlled to be very
close to VEAP. While a load step transient from light load
to heavy load could cause VFB lower than VEAP by several
tens of mV. In prior design, owing to limited control
bandwidth, controller is hard to prevent VOUT undershoot
during quick load transient from light load to heavy load.
RT8855 buit in proprietary Burst Transient Response
(BTRTM ) technology, that detects load transient by
comparing VFB and VEAP. If VFB suddenly drops below
“VEAP − VOR”, VQR is a predetermined voltage. The quick
response indicator QR rises up. When QR = high, RT8855
turns on all high side MOSFETs and turn off all low side
MOSFETs. The sensitivity of quick response can be
adjusted by the values of CFB and RFB. Smaller RFB and/
or larger CFB will make QR easier to be trigger. Figure8 is
the circuit and typical waveforms.
DS8855-01 April 2011
www.richtek.com
13
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