RT8856 데이터 시트보기 (PDF) - Richtek Technology

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RT8856

Multi-Phase PWM Controller for CPU Core Power Supply

Richtek Technology 

RT8856

The RT8856 provides 2 slew rates for deeper sleep mode

entry/ exit. For standard deeper sleep exit, the RT8856

immediately activates all enabled phases and ramps the

output voltage to the DAC code provided by the processor

at the slew rate of 100μA/CSOFT. The RT8856 remains in

1-phase ringing free mode and ramps the output voltage

to the DAC code provided by the processor at the slew

rate of 20μA/CSOFT.

Current Limit Setting

The RT8856 compares a programmable current limit set

point to the voltage from the current sense amplifier output

for Over Current Protection (OCP). The voltage applied to

OCSET pin defines the desired current limit threshold,

ILIM :

VOCSET = 25 x ILIM x RSENSE

(16)

Connect a resistive voltage divider from VCC to GND, with

the joint of the voltage divider connected to OCSET pin as

shown in Figure 6. For a given ROC2,

ROC1

=

ROC2

×

⎛

⎜⎝

VCC

VOCSET

− 1⎟⎠⎞

(17)

RT8856

VCC

OCSET

ROC1

ROC2

Figure 6. OCP Setting Without Temperature

Compensation

The OCP works in two stages :

` Stage 1 : Average inductor current exceeds the current

limit threshold, ILIM, defined by VOCSET, but remains

smaller than 150% of ILIM If the over current condition

remains valid for 16 cycles, the OCP latches and the

system shuts down.

` Stage 2 : Any inductor current exceeds 150% of ILIM

then OCP latches instantaneously.

Latched OCP forces driver high impedance with

UGATEx = 0 and LGATEx = 0. After latched OCP happens,

VVSEN will be monitored. When VVSEN falls below 200mV,

a discharging resistor at VSEN will be enabled.

If inductor DCR is used as current sense component, then

DS8856-03 June 2011

temperature compensation is recommended to protect

under all conditions. Figure 7 shows a typical OCP setting

with temperature compensation.

VCC

RT8856 ROC1a

NTC

OCSET

ROC1b

ROC2

Figure 7. OCP Setting with Temperature Compensation

Usually, select ROC1a equal to thermistor's nominal

resistance at room temperature. Ideally, VOCSET should

have same temperature coefficient as RSENSE (Inductor

DCR) :

VOCSET, HOT = RSENSE, HOT

VOCSET, COLD RSENSE, COLD

(18)

According to the basic circuit calculation, VOCSET can be

obtained at any temperature :

VOCSET, T

=

ROC1a

ROC2

// RNTC, T + ROC1b

+ ROC2

(19)

Re-write Equation (18) from (19), and get VOCSET at room

temperature

ROC1a // RNTC, COLD + ROC1b + ROC2

ROC1a // RNTC, HOT + ROC1b + ROC2

=

RSENSE, HOT

RSENSE, COLD

(20)

VOCSET,

25

=

ROC1a

ROC2

// RNTC, 25 + ROC1b

+ ROC2

(21)

Solving Equation (20) and (21) yields ROC1b and ROC2

ROC2 =

α × REQU, HOT − REQU, COLD + (1− α) × REQU, 25

(22)

VCC × (1− α)

VOCSET, 25

ROC1b =

(α − 1) × ROC2 + α × REQU, HOT − REQU, COLD

(23)

(1− α)

where

α=

RSENSE, HOT

RSENSE, COLD

=

DCR25 × [1+ 0.00393 × (THOT − 25)]

DCR25 × [1+ 0.00393 × (TCOLD − 25)]

(24)

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