RT8857 데이터 시트보기 (PDF) - Richtek Technology

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RT8857

4/3/2/1-Phase PWM Controller with Embedded Drivers for CPU Core Power Supply

Richtek Technology 

current error signals IERRn (= IX[n] − AVG(IX[n])) are used

to raise or lower the internal sawtooth waveforms

(RAMP[1] to RAMP[n]) which are compared with ErrorAmp

output (COMP) to generate PWM signal. The raised

sawtooth waveform will decrease the PWM duty of the

corresponding channel while the lowered will increase.

Eventually, current flowing through each channel will be

balanced.

RT8857/A

I1

I2

IOUT, total

Constant ratio

L DCR

CSA: Current Sense Amplifier

RS

CS

ISP RISP

235nA

+

IX

VOFS_CSA

+

-

-

ISN RISN

235nA

Figure 8. Circuit for Channel Current Sensing

COMP

RAMP[1]

+-

Interleaved IERR[1] x RCB

RAMP[n]

+-

+

CMP

-

+

CMP

-

BUF

BUF

PWM[1]

PWM[n]

IERR[n] x RCB

Figure 9. Circuit for Channel Current Balance

Channel Current Adjust

If channel current is not balanced due to asymmetric PCB

layout of power stage, external resistors can be adjusted

to correct current imbalance. Figure 10 shows two types

of current imbalance, constant ratio type and constant

difference type.

If the initial current distribution is constant ratio type,

according to Equation (8), reduce RCSN[1] can reduce IL[1]

and improve current balance. If the initial current distribution

is constant difference type, according to Equation (7),

increase RCSP[1] can reduce IL[1] and improve current

balance.

I1

I2

IOUT, total

Constant difference

Figure 10. Channel Current vs. Total Current

Over Current Protection (OCP)

RT8857/A provides sing phase OCP and multi-phase OCP

according to the operation condition. In Figure 11, single

phase OCP (IMAXPSI) and multi-phase OCP (IMAX)

thresholds can be set by external resistors :

VIMAX

=

VCC5

× R2 + R3

R1 + R2 + R3

(10)

VIMAXPSI

=

VCC5

×

R1

+

R3

R2

+

R3

(11)

Once VADJ is larger than the negative input of CP

comparator, OCP will be triggered and latched, and

RT8857/A will turn off both high side and low side

MOSFETs of all channels. A 20us delay after OCP

detection is used to prevent false trigger.

Over Voltage Protectiom (OVP)

The over voltage protection monitors the output voltage

via the FB pin. Once VFB exceeds “VEAP + 150mV”, OVP

is triggered and latched. RT8857/A will try to turn on low

side MOSFET and turn off high side MOSFET to protect

CPU. A 20us delay is used in OVP detection circuit to

prevent false trigger.

DS8857/A-01 April 2011

www.richtek.com

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