RT8859M 데이터 시트보기 (PDF) - Richtek Technology
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RT8859M Datasheet PDF : 51 Pages
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RT8859M
Parameter
Divided Input Voltage
Detection (DVDx)
Threshold
Delay of UVLO, DVDx
Delay of OVP
Symbol
VD VDx
VD VDHY S
tUVLO
tOV
Under Voltage Protection
(UVP) Threshold
VUV
Test Conditions
VDVDx Threshold
Falling Edge Hysteresis
Rising Above Threshold
VISENxN Rising Above Threshold, Pin
OFS Disable
Measured at ISEN1N/ISENAN with
respect to unloaded output voltage
(UOV) (for 0.8 < UOV < 1.52)
Min Typ Max Unit
1.01 1.06 1.11 V
--
25
-- mV
--
3
--
μs
--
1
--
μs
−350 −300 −250 mV
Delay of UVP
Negative Voltage
Protection Threshold
Delay of NVP
tUVP
VNVP
tNVP
Current Limit Gain Setting
(per phase)
GILIM IT
Current Limit Latch
Counter (per phase)
NILIM
EN Input
Threshold
Voltage
Logic-High VIH
Logic-Low VIL
Logic Inputs
VISENxN Falling below Threshold
After OVP, Falling Edge
--
3
--
μs
−100 −50 -- mV
VISENxN Falling below Threshold
--
1
--
μs
GILIMIT = VOCSET / (VISENxP
− VISENxN), VOCSET = 2.400V,
43.2 48 52.8
(VISENxP − VISENxN) = 50mV
V/V
GILIMITA = VOCSETA / (VISENAP
− VISENAN), VOCSETA = 2.4V, (VISENAP 43.2 48 52.8
− VISENAN) = 50mV
Times of UGATE Rising
--
15
-- Times
0.7 --
--
V
--
-- 0.3
EN Hysteresis
VEN HYS
--
30
-- mV
Leakage Current of EN IEN
VCLK, VDIO
Input
Threshold
Voltage
Logic-High VIH
Logic-Low VIL
VCLK,VDIO Hysteresis VHYS
Leakage Current of
ADD,VCLK,VDIO
IL EA K_ IN
−1
--
1
μA
0.665 --
--
V
--
-- 0.367
--
70
-- mV
−1
--
1
μA
ALERT
ALERT Low Voltage
Power On Sequence
VAL ERT
IALERT = 10mA
--
-- 0.13 V
SVID Ready Delay Time
VR_RDY Trip Threshold
VR_RDY Low Voltage
VR_RDY Delay
tA
VTH_VR_RDY
VVR _RDY
tV R_R DY
From EN = high until VR Controller is
ready to accept SVID command
VISENxN − 1st VDAC
IVR_RDY = 4mA
VISENxN = VINITIAL to VR_RDY High
--
--
2 ms
-- −100 -- mV
--
-- 0.4 V
--
100 --
μs
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
www.richtek.com
20
is a registered trademark of Richtek Technology Corporation.
DS8859M-05 July 2012
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