S25FL127S 데이터 시트보기 (PDF) - Spansion Inc.
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S25FL127S Datasheet PDF : 131 Pages
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Data Sheet (Preliminary)
Table 4.3 Interface States Summary with HOLD# / IO3 Enabled
Interface State
Power-Off
Low Power Hardware Data
Protection
Power-On (Cold) Reset
Interface Standby
Instruction Cycle (Legacy SPI)
Hold Cycle
Single Input Cycle
Host to Memory Transfer
Single Latency (Dummy) Cycle
Single Output Cycle Memory to
Host Transfer
Dual Input Cycle Host to Memory
Transfer
Dual Latency (Dummy) Cycle
Dual Output Cycle Memory to Host
Transfer
QPP Address Input Cycle Host to
Memory Transfer
Quad Input Cycle Host to Memory
Transfer
Quad Latency (Dummy) Cycle
Quad Output Cycle Memory to Host
Transfer
VDD
<VCC (low)
<VCC (cut-off)
≥VCC (min)
≥VCC (min)
≥VCC (min)
≥VCC (min)
≥VCC (min)
≥VCC (min)
≥VCC (min)
≥VCC (min)
≥VCC (min)
≥VCC (min)
≥VCC (min)
≥VCC (min)
≥VCC (min)
≥VCC (min)
SCK
X
X
X
X
HT
HV or HT
HT
HT
HT
CS#
X
X
HH
HH
HL
HL
HL
HL
HL
HOLD# /
IO3
X
X
X
X
HH
HL
HH
HH
HH
WP# /
IO2
X
X
X
X
HV
X
X
X
X
HT
HL
HH
X
HT
HL
HH
X
HT
HL
HH
X
HT
HL
X
X
HT
HL
HV
HV
HT
HL
X
X
HT
HL
MV
MV
Legend
Z = no driver - floating signal
HL = Host driving VIL
HH = Host driving VIH
HV = either HL or HH
X = HL or HH or Z
HT = toggling between HL and HH
ML = Memory driving VIL
MH = Memory driving VIH
MV = either ML or MH
SO /
IO1
Z
Z
Z
Z
Z
X
Z
Z
MV
SI / IO0
X
X
X
X
HV
X
HV
X
X
HV
HV
X
X
MV
MV
X
HV
HV
HV
X
X
MV
MV
4.3.1
4.3.2
4.3.3
Power-Off
When the core supply voltage is at or below the VCC (low) voltage, the device is considered to be powered off.
The device does not react to external signals, and is prevented from performing any program or erase
operation.
Low Power Hardware Data Protection
When VCC is less than VCC (cut-off) the memory device will ignore commands to ensure that program and
erase operations can not start when the core supply voltage is out of the operating range.
Power-On (Cold) Reset
When the core voltage supply remains at or below the VCC (low) voltage for ≥ tPD time, then rises to ≥ VCC
(Minimum) the device will begin its Power On Reset (POR) process. POR continues until the end of tPU. During
tPU the device does not react to external input signals nor drive any outputs. Following the end of tPU the
device transitions to the Interface Standby state and can accept commands. For additional information on
POR see Power-On (Cold) Reset on page 38.
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S25FL127S
S25FL127S_00_02 April 25, 2013
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