S3C24A0A 데이터 시트보기 (PDF) - Samsung

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S3C24A0A

32-BIT RISC MICROPROCESSOR

Samsung 

S3C24A0A RISC MICROPROCESSOR (Preliminary Spec)

CLOCK & POWER MANAGEMENT

CLOCK CONTROL REGISTER (CLKCON) (Continued)

CLKCON

UART1clkOn

UART0clkOn

PWMTIMERClkOn

USBhostClkOn

AC97clkOn

Reserved

IrDAclkOn

Reserved

ClockIdle

ClkMonOn

ClockStop

Bit

Description

[10] Controls PCLK into UART1 block

0 = Disable 1 = Enable

[9] Controls PCLK into UART0 block

0 = Disable 1 = Enable

[8] Controls PCLK into PWMTIMER block

0 = Disable 1 = Enable

[7] Controls HCLK into USB host block

0 = Disable 1 = Enable

[6] Controls PCLK into AC97 block

0 = Disable 1 = Enable

[5] Reserved(Should be zero)

[4] Controls UPLL_clk into IrDA block

0 = Disable 1 = Enable

[3] Reserved

[2] Enters IDLE mode. This bit is not cleared automatically.

0 = Disable 1 = Transition to IDLE mode

[1] HCLK monitor Enable

0 = Disable 1 = Enable

[0] Enters STOP mode. This bit is not cleared automatically.

0 = Disable 1 = Transition to STOP mode

Initial State

1

1

1

1

1

0

1

0

0

0

0

Preliminary product information describe products that are in development,

for which full characterization data and associated errata are not yet available.

Specifications and information herein are subject to change without notice.

33-17

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