S3C7295 데이터 시트보기 (PDF) - Samsung

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S3C7295

The S3C7295 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47

Samsung 

S3C7295/P7295

TIMING WAVEFORMS

ELECTRICAL DATA

VDD

RESET

EXECUTION OF

STOP INSTRUCTION

INTERNAL RESET

OPERATION

STOP MODE

IDLE MODE

DATA RETENTION MODE

NORMAL MODE

VDDDR

tSREL

tWAIT

Figure 13-2. Stop Mode Release Timing When Initiated by RESET

VDD

EXECUTION OF

STOP INSTRUCTION

STOP MODE

DATA RETENTION MODE

VDDDR

POWER-DOWN MODE TERMINATING SIGNAL

(INTERRUPT REQUEST)

IDLE MODE

NORMAL MODE

tSREL

tWAIT

Figure 13-3. Stop Mode Release Timing When Initiated by Interrupt Request

13-9

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