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SI-3000R 데이터 시트보기 (PDF) - Sanken Electric co.,ltd.

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SI-3000R Datasheet PDF : 5 Pages
1 2 3 4 5
qSI-3000R Series
sReset Signal Output Timing Chart
Input Voltage
VIN
VO+VDIF
GND
Voth
VO
Output Voltage
GND
Voltage Across
Delay Capacitor
VDLYth
Voth
VDLY
O(V)
Reset Signal Output
VRSTH
O(V)
VRSTL
tDLY
tRESET (mim.)
tDLY
Vo drops for a period
less than tRESET (min)
sOutline Drawing
φ 3.2±0.2
10.0±0.2
4.2±0.2
2.8±0.2
The delay time tDLY of the reset signal can
be calculated from the following formula:
VDLYth
tDLY=
× CDLY
IDLY
*IDLY is the current flowing from the DLY
terminal shown in the standard connec-
tion circuit diagram.
(unit:mm)
Part Number
Lot Number
2.6±0.1
0.95±0.15
0.85
+0.2
–0.1
P1.7±0.7×4=6.8±0.7
0.45
+0.2
–0.1
3.9±0.7
(4.3)
8.2±0.7
1 2345
Forming No. 1101
Plastic Mold Package Type
Flammability: UL94V-0
Weight: Approx. 2.3g
Terminal Connections
q GND
w DELAY
e VO
r Rest Signal output
t VIN
54

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