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SL11R

USB Controller/16-Bit RISC Processor Data Sheet

Cypress Semiconductor 

SL11R

Table of Contents

1.0 DEFINITIONS .................................................................................................................................. 8

2.0 REFERENCES ................................................................................................................................ 8

3.0 INTRODUCTION ............................................................................................................................. 8

3.1 Overview ......................................................................................................................................... 8

3.2 SL11R Features .............................................................................................................................. 8

3.3 SL11R 16-Bit RISC Processor .................................................................................................... 10

3.4 3Kx16 Mask ROM and BIOS ........................................................................................................ 10

3.5 Internal RAM ................................................................................................................................. 10

3.6 Clock Generator ........................................................................................................................... 11

3.7 USB Interface ............................................................................................................................... 11

3.8 Processor Control Registers ...................................................................................................... 11

3.9 Interrupts ...................................................................................................................................... 11

3.10 UART Interface ........................................................................................................................... 11

3.11 *2-wire Serial EEPROM Interface .............................................................................................. 11

3.12 External SRAM/DRAM/EPROM Interface ................................................................................. 11

3.13 General Timers and Watch Dog Timer ..................................................................................... 11

3.14 Special GPIO Functionality for Suspend, Resume and Low Power modes ......................... 11

3.15 Programmable Pulse/PWM Interface ....................................................................................... 11

3.16 Mailbox and DMA Overview ...................................................................................................... 12

3.17 Mailbox Interface ....................................................................................................................... 12

3.18 DMA Interface ............................................................................................................................. 13

3.19 Fast DMA Mode .......................................................................................................................... 14

3.20 SL11R Interface Modes ............................................................................................................. 14

3.20.1 General Purpose IO mode (GPIO) ................................................................................................... 15

3.20.2 8/16-bit DMA Mode ........................................................................................................................... 15

3.20.3 Fast EPP Mode .................................................................................................................................. 15

3.20.4 DVC 8-bit DMA Mode ........................................................................................................................15

4.0 INTERFACE .................................................................................................................................. 15

4.1 Internal Masked ROM: 0xE800-0xFFFF ...................................................................................... 15

4.2 External ROM: 0xC100-0xE800 ................................................................................................... 15

4.3 Internal RAM: 0x0000-0x0BFF .................................................................................................... 16

4.4 Clock Generator ........................................................................................................................... 16

4.5 USB Interface ............................................................................................................................... 18

4.5.1 USB Global Control & Status Register (0xC080: R/W) ....................................................................18

4.5.2 USB Frame Number Register (0xC082: Read Only) ........................................................................ 18

4.5.3 USB Address Register (0xC084: R/W) ..............................................................................................18

4.5.4 USB Command Done Register (0xC086: Write Only) ...................................................................... 19

4.6 USB Endpoint 0 Control & Status Register (0xC090: R/W) ...................................................... 19

4.7 USB Endpoint 1 Control & Status Register (0xC092: R/W) ...................................................... 19

4.8 USB Endpoint 2 Control & Status Register (0xC094: R/W) ...................................................... 19

4.9 USB Endpoint 3 Control & Status Register (0xC096: R/W) ...................................................... 19

4.9.1 General Description for All Endpoints from Endpoint 0 to Endpoint 3 ......................................... 19

4.9.2 USB Endpoints Control (For Writing) ............................................................................................... 19

4.9.3 USB Endpoints Status (For Reading) ............................................................................................... 20

4.9.4 USB Endpoint 0 Address Register (0x0120: R/W) ........................................................................... 20

4.9.5 USB Endpoint 1 Address Register (0x0124: R/W) ........................................................................... 20

4.9.6 USB Endpoint 2 Address Register (0x0128: R/W) ........................................................................... 20

4.9.7 USB Endpoint 3 Address Register (0x012C: R/W) ..........................................................................20

Document #: 38-08006 Rev. **

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