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SP3221E 데이터 시트보기 (PDF) - Signal Processing Technologies

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SP3221E
Sipex
Signal Processing Technologies Sipex
SP3221E Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
NAME
EN
C1+
V+
C1-
C2+
FUNCTION
Receiver Enable. Apply logic HIGH for normal operation.
Apply logic LOW to disable the receiver outputs (high-Z
state).
Positive terminal of the voltage doubler charge-pump
capacitor.
Regulated +5.5V output generated by the charge pump.
Negative terminal of the voltage doubler charge-pump
capacitor.
Positive terminal of the inverting charge-pump capacitor.
PIN NO.
1
2
3
4
5
C2-
Negative terminal of the inverting charge-pump capacitor.
6
V-
Regulated -5.5V output generated by the charge pump.
7
R1IN
RS-232 receiver input.
8
R1OUT TTL/CMOS receiver output.
9
STATUS
TTL/CMOS Output indicating ONLINE and SHUTDOWN
status.
10
T1IN
TTL/CMOS driver input.
11
Apply logic HIGH to override Auto-Online circuitry keeping
ONLINE drivers active (SHUTDOWN must also be logic HIGH, refer
12
to Table 2).
T1OUT RS-232 driver output.
13
GND
Ground.
14
VCC
+3.0V to +5.5V supply voltage.
15
Apply logic LOW to shut down drivers and charge pump.
SHUTDOWN This overrides all Auto-Online circuitry and ONLINE (refer to
16
Table 2).
Table 1. Device Pin Description
Date: 7/21/04
SP3221E +3.0V to +5.5V RS-232 Transceiver
5
© Copyright 2004 Sipex Corporation

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