SP506(2004) 데이터 시트보기 (PDF) - Signal Processing Technologies

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SP506
(Rev.:2004)

5V, Single Chip WAN Multi-Mode Serial Transceiver

Signal Processing Technologies 

Output

Under

Test CL

500Ω

S1

VCC

S2

Figure 34. Driver Timing Test Load Circuit

Receiver

Output

Test Point

1KΩ

S1

VCC

CRL

1KΩ

S2

Figure 35. Receiver Timing Test Load Circuit

DRIVER +3V

INPUT 0V

DRIVER A

OUTPUT B

DIFFERENTIAL VO+

OUTPUT 0V

VA – VB VO–

tSKEW = | tDPLH - tDPHL |

f > 10MHz; tR < 10ns; tF < 10ns

1.5V

1.5V

VO 1/2VO

tPLH

tPHL

tDPLH

tDPHL

tR

Figure 36. Driver Propagation Delays

1/2VO

tF

+3V

DECx or Tx_Enable

0V

5V

A, B

VOL

VOH

A, B

0V

1.5V

tZL

2.3V Output normally LOW

2.3V Output normally HIGH

tZH

Figure 37. Driver Enable and Disable Times

1.5V

tLZ

0.5V

0.5V

tHZ

A–B

V0D2+

V0D2–

VOH

RECEIVER OUT

VOL

tSKEW = | tPHL - tPLH |

tPLH

Figure 38. Receiver Propagation Delays

f > 10MHz; tR < 10ns; tF < 10ns

0V

INPUT

OUTPUT

(VOH - VOL)/2

tPHL

0V

(VOH - VOL)/2

Rev: A Date: 1/27/04

SP506 Multi–Mode Serial Transceiver

13

© Copyright 2004 Sipex Corporation

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