VN710SP
ELECTRICAL TRANSIENTS REQUIREMENTS ON VCC PIN
ISO T/R 7637/1
Test Pulse
I
TEST LEVELS
II
III
IV
1
-25V
-50V
-75V
-100V
2
+25V
+50V
+75V
+100V
3a
-25V
-50V
-100V
-150V
3b
+25V
+50V
+75V
+100V
4
-4V
-5V
-6V
-7V
5
+26.5V
+46.5V
+66.5V
+86.5V
Delays and Impedance
2ms, 10Ω
0.2ms, 10Ω
0.1ms, 50Ω
0.1ms, 50Ω
100ms, 0.01Ω
400ms, 2Ω
ISO T/R 7637/1
Test Pulse
I
TEST LEVELS RESULT
II
III
IV
1
C
C
C
C
2
C
C
C
C
3a
C
C
C
C
3b
C
C
C
C
4
C
C
C
C
5
C
E
E
E
CLASS
C
E
CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure and cannot be
returned to proper operation without replacing the device.
SUGGESTED SCHEME FOR ISO TEST PULSE
10KΩ
from test
generator
10KΩ
10KΩ
ENABLE VCC
INPUT
STATUS
OUTPUT
GND
open
Warning: Input, Enable, Status Pulled to VCC voltage during
negative transient.
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