SST39VF040-55-4I-MKE 데이터 시트보기 (PDF) - Silicon Storage Technology

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SST39VF040-55-4I-MKE

512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit (x8) Multi-Purpose Flash

Silicon Storage Technology 

512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash

SST39LF512 / SST39LF010 / SST39LF020 / SST39LF040

SST39VF512 / SST39VF010 / SST39VF020 / SST39VF040

Data Sheet

ADDRESS AMS-0

CE#

5555

SIX-BYTE CODE FOR CHIP-ERASE

2AAA

5555

5555

2AAA

5555

TSCE

OE#

WE#

TWP

DQ7-0

AA

55

80

AA

55

10

SW0

SW1

SW2

SW3

SW4

SW5

1150 F17.0

Note: This device also supports CE# controlled Chip-Erase operation. The WE# and CE# signals are

interchageable as long as minmum timings are met. (See Table 10)

AMS = Most significant address

AMS = A15 for SST39LF/VF512, A16 for SST39LF/VF010, A17 for SST39LF/VF020, and A18 for SST39LF/VF040

FIGURE 12: WE# Controlled Chip-Erase Timing Diagram

ADDRESS A14-0

CE#

Three-byte Sequence for

Software ID Entry

5555

2AAA

5555

0000

0001

OE#

WE#

DQ7-0

TWP

TIDA

AA

SW0

TWPH

55

SW1

90

SW2

TAA

BF

Device ID

1150 F09.2

Note: Device ID = D4H for SST39LF/VF512, D5H for SST39LF/VF010, D6H for SST39LF/VF020, and D7H for SST39LF/VF040.

FIGURE 13: Software ID Entry and Read

©2010 Silicon Storage Technology, Inc.

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