512 Kbit / 1 Mbit Multi-Purpose Flash
SST39SF512 / SST39SF010
Data Sheet
ADDRESS AMS-0
CE#
OE#
TOEH
TCE
TOE
WE#
DQ6
Note
Note: Toggle bit output is always high first.
AMS = Most significant address
AMS = A15 for SST39SF512 and A16 for SST39SF010
FIGURE 8: TOGGLE BIT TIMING DIAGRAM
TOES
TWO READ CYCLES
WITH SAME OUTPUTS
394 ILL F07.1
SIX-BYTE CODE FOR SECTOR-ERASE
TSE
ADDRESS AMS-0
5555 2AAA
5555
5555
2AAA
SAX
CE#
OE#
WE#
TWP
DQ7-0
AA
SW0
55
SW1
80
SW2
AA
SW3
55
SW4
30
SW5
Note: This device also supports CE# controlled Sector-Erase operation. The WE# and CE# signals are
interchageable as long as minimum timings are met. (See Table 10)
SAX = Sector Address
AMS = Most significant address
AMS = A15 for SST39SF512 and A16 for SST39SF010
FIGURE 9: WE# CONTROLLED SECTOR-ERASE TIMING DIAGRAM
394 ILL F08.2
©2001 Silicon Storage Technology, Inc.
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