SST39SF512-70-4I-U 데이터 시트보기 (PDF) - Silicon Storage Technology

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SST39SF512-70-4I-U

512 Kbit / 1 Mbit (x8) Multi-Purpose Flash

Silicon Storage Technology 

512 Kbit / 1 Mbit Multi-Purpose Flash

SST39SF512 / SST39SF010

Data Sheet

ADDRESS AMS-0

CE#

SIX-BYTE CODE FOR CHIP-ERASE

5555 2AAA

5555

5555

2AAA

5555

TSCE

OE#

WE#

TWP

DQ7-0

AA

55

80

AA

55

10

SW0

SW1

SW2

SW3

SW4

SW5

Note: This device also supports CE# controlled Chip-Erase operation. The WE# and CE# signals are

interchageable as long as minimum timings are met. (See Table 10)

SAX = Sector Address

AMS = Most significant address

AMS = A15 for SST39SF512 and A16 for SST39SF010

FIGURE 10: WE# CONTROLLED CHIP-ERASE TIMING DIAGRAM

394 ILL F17.1

ADDRESS A14-0

Three-byte sequence for

Software ID Entry

5555

2AAA

5555

0000

0001

CE#

OE#

WE#

TWP

TIDA

DQ7-0

TWPH

AA

55

90

SW0

SW1

SW2

Device ID = B5H for SST39SF010 and B6H for SST39SF020

TAA

BF

Device ID

394 ILL F09.2

FIGURE 11: SOFTWARE ID ENTRY AND READ

©2001 Silicon Storage Technology, Inc.

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S71149-03-000 4/01 394

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