SST39LF-800A-704C-B3KE 데이터 시트보기 (PDF) - Silicon Storage Technology

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SST39LF-800A-704C-B3KE

2 Mbit / 4 Mbit / 8 Mbit (x16) Multi-Purpose Flash

Silicon Storage Technology 

2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash

SST39LF200A / SST39LF400A / SST39LF800A

SST39VF200A / SST39VF400A / SST39VF800A

Data Sheet

ADDRESS AMS-0

CE#

OE#

TCE

TOEH TOE

TOES

WE#

DQ6

TWO READ CYCLES

WITH SAME OUTPUTS

Note: AMS = Most significant address

AMS = A16 for SST39LF/VF200A, A17 for SST39LF/VF400A and A18 for SST39LF/VF800A

FIGURE 9: Toggle Bit Timing Diagram

1117 F07.3

ADDRESS AMS-0

CE#

5555

SIX-BYTE CODE FOR CHIP-ERASE

2AAA

5555

5555

2AAA

5555

TSCE

OE#

WE#

TWP

DQ15-0

XXAA

SW0

XX55

SW1

XX80

SW2

XXAA

SW3

XX55

SW4

XX10

SW5

Note: This device also supports CE# controlled Chip-Erase operation. The WE# and CE# signals are

interchageable as long as minimum timings are met. (See Table 16)

AMS = Most significant address

AMS = A16 for SST39LF/VF200A, A17 for SST39LF/VF400A and A18 for SST39LF/VF800A

X can be VIL or VIH, but no other value.

FIGURE 10: WE# Controlled Chip-Erase Timing Diagram

1117 F08.7

©2010 Silicon Storage Technology, Inc.

17

S71117-12-000

04/10

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