STV5345 데이터 시트보기 (PDF) - STMicroelectronics

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STV5345

TELETEXT DECODER WITH 8 INTEGRATED PAGES

STMicroelectronics 

STV5345 - STV5345/H - STV5345/T

REGISTER FUNCTIONS

Register

R0

Address

00H

R1

Address

01H

R2

Address

02H

R3

Address

03H

R4

Address

04H

R5

Address

05H

R6

Address

06H

R7

Address

07H

Function

Bit(s)

Description

R11 adressing

and pin functions

control

SEL 11B (D0)

TC (D1)

EVEN OFF (D2)

Selection of register 11B (D0 = 1) or 11A(D0 = 0)

Test bit, must be cleared in the normal working mode

Control of ODD/EVEN pin : EVEN signal output (D2 = 0) or

grounded (D2 = 1)

T1

T0

0

0

312/313 line MIX - mode with interlace

0

1

312/313 line TEXT - mode without interlace

1

0

312/312 line Terminal mode without interlace

1

1

External synchronization TCS/SCS is an input

TCS ON (D2)

D2 = 1, TCS output on Pin TCS/SCS

D2 = 0, SCS input on Pin TCS/SCS

Operating mode

controls

DEW / FULLFIELD Selection of field flyback mode or full channel mode

(D3)

(D3 = 1)

GHOST ROW

ENABLE (D4)

Selection of ghost row mode (D4 = 1)

ACQUISITION

ON / OFF (D5)

Control of acquisition operation (D5 = 0 enables acquisition)

7 bits + parity or 8 Selection of received data format either 7 bits with parity

bits without parity (D6) (D6 = 0) or 8 bits without parity (D6 = 1).

TA (D7)

Test bit, must be cleared in the normal working mode

SC0, SC1, SC2

(D0, D1, D2)

Address the first column of the on chip page request RAM

to be written.

Addressing

information for

a page request

TB (D3)

A0, A1 (D4, D5)

A2 (D6)

Test bit, must be cleared in the normal working mode.

Address a group of four consecutive pages currently used

for data acquisition;

Address of one of the two groups of four pages for

acquisition in normal mode.

A3 (D7)

Block select: D7 = 0 internal memory, D7 = 1 external

memory

Data relative to

the requested

page (see Table 3)

PRD0 - PRD4

(D0 - D4)

Written data in the page request RAM, starting with the

columns addressed by SC0,SC1,SC2.

Selection of one

of 16 pages to

display

A0, ... A3

(D0, ... D3)

These 4 bits correspond to the logical states of the 4

address lines (A10, ... A13) during memory read cycles.

PON (D0, D1)

Picture on (IN: D0, OUT: D1)

Display control for

normal operation

TEXT (D2, D3)

COR (D4, D5)

Text on (IN: D2, OUT: D3)

Contrast reduction on (IN: D4, OUT: D5)

BKGND (D6, D7) Background colour on (IN: D6, OUT: D7)

IN / OUT

Enable inside/outside the box

Display control for

news-flash

subtitle generation

See R5

See R5

BOX ON 0, 1-23,24 The ”boxing” function is enabled on row 0,1-23 and 24 by

(D0, D1, D2)

D0, D1 and D2 set to one.

Display mode

TOP/BOTTOM X0 = Normal

Single/Double Height 01 = double height Rows 0 to 11

(D4/D3)

11 = double height Rows 12 to 23

Conceal/Reveal (D5) Conceal Reveal Function

Cursor ON/OFF (D6) Cursor position given by row/column value of R9/R10

STATUS ROW

BTM / TOP (D7)

The 25th row is displayed before the ”Main text Area”

(lines 0-23) or after (D7 = 0).

16/25

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