SX1223 데이터 시트보기 (PDF) - Semtech Corporation
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SX1223 Datasheet PDF : 25 Pages
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SX1223
5.2.2 Other Settings
The tables below give the definition of all the parameters of the configuration registers besides the working modes.
Add Bits PA2
0 4-2
0
0
0
0
1
1
1
1
PA1
PA0
State
0
0
21dB attenuation
0
1
18dB attenuation
1
0
15dB attenuation
1
1
12dB attenuation
0
0
9dB attenuation
0
1
6dB attenuation
1
0
3dB attenuation
1
1
Max output (default)
Table 9: Power amplifier output power
Add Bit ClkOut_en State
01
0
ClkOut off
1
ClkOut on
Comments
Output is 0 volt on pin CLKOUT.
A clock at XCO frequency divided by 16 is
available on pin CLKOUT. (default)
Table 10: Output clock
Add Bit Sync_en State
00
0
DCLK pin off
1
DCLK pin on
Comments
Transparent transmission of data
Bit-clock is generated by transceiver
(default)
Table 11: Synchronizer mode
Add Bit Modulation1Modulation0 State
1 7-6
0
0
Closed loop VCO-modulation (mw1)
0
1
Open loop VCO-modulation (mw2)
1
0
Modulation by M, N and A (mw3)
1
1
Not used
Table 12: Modulation mode
Comments
VCO is phase-locked
VCO is free-running
(default)
Modulation inside PLL
Add Bit FreqBand Comments
15
0
RF frequency 425-475 MHz
1
RF frequency 850-950 MHz (default)
Table 13: Frequency band
Add Bit XCOcap_en Comments
14
0
Internal capacitors for the crystal oscillator turned off
Internal capacitors for the crystal oscillator turned on, external capacitors not needed
1
(default)
Table 14: XCO internal capacitor
© Semtech 2007
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