Philips Semiconductors
10-bit high-speed analog-to-digital
converter
Product specification
TDA8760
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
Switching characteristics
CLOCK FREQUENCY fclk (note 1; see Fig.3)
fclk(min)
fclk(max)
minimum clock frequency
maximum clock frequency
TDA8760K/4
−
−
1
40
−
−
TDA8760K/2
20
−
−
tCPH
clock pulse width HIGH
note 7
tCPL
clock pulse width LOW
10
−
−
8
−
−
Analog signal processing in differential input mode; see Table 1; 50% clock duty factor;
VI(p-p) = VrefH − VrefL = 1.5 V
LINEARITY
ILE
DC integral linearity error
fclk = 4 MHz
−
DLE
DC differential linearity error fclk = 4 MHz
−
AILE
AC integral linearity error
note 3
−
OFE
offset error
VCCA = VCCD = VCCO = 5 V; −3
VI = VI; Tamb = 25 °C;
output code = 511
GE
gain error; amplitude spread VCCA = VCCD = VCCO = 5 V; −10
between devices
Tamb = 25 °C;
VrefH − VrefL = 1.5 V
BANDWIDTH (fclk = 40 MHZ); note 9
B
Analog bandwidth
−1 dB
−
−3 dB
−
HARMONICS (fclk = 40 MHZ); see Figs 6, 8 and 9
f1
fundamental harmonics
fi = 4.43 MHz
−
(full scale)
fall
harmonics (full scale);
fi = 4.43 MHz
all components
second harmonics
−
third harmonics
−
THD
total harmonic distortion
fi = 4.43 MHz; note 2
−
SIGNAL-TO-NOISE RATIO; notes 4 and 5; see Figs 6, 8 and 9
SNR
signal-to-noise ratio
without harmonics;
54
fclk = 40 MHz;
fi = 4.43 MHz; Tamb = 25 °C
±1.0
±2.0
±0.6
±1.0
±1.2
±2.0
−
+3
−
+10
140
−
220
−
−
0
−70
−63
−70
−63
−65
−60
56
−
UNIT
MHz
MHz
MHz
ns
ns
LSB
LSB
LSB
LSB
LSB
MHz
MHz
dB
dB
dB
dB
dB
1996 Sep 12
10