TH8061 데이터 시트보기 (PDF) - Melexis Microelectronic Systems
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TH8061 Datasheet PDF : 36 Pages
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TH8061
Voltage Regulator with integrated LIN Transceiver
Figure 17 - Output current of reset output vs. VCC voltage
3.9 Mode Input EN
The TH8061 is switched into the sleep mode with a falling edge and into normal mode with a rising edge at
the EN pin. The normal mode will be kept as long as EN = high.
The deactivation of TH8061 with a falling edge at EN can be done independently from the state of the bus-
transceiver.
VSUP
EN
Voltage
limiter
4µA
96µA
enable
Figure 18 - EN input circuitry
The maximum input voltage is VSUP. The threshold is typ. 2.1V and therefore also CMOS levels can be
used as input signal. Figure 18 shows the internal circuitry of the EN pin.
The EN input is internally pulled down to secure that if this pin is not connected a low level will be generated.
It will be used two different pull down current sources for high and low level to minimize the sleep mode
current.
The 4µA pull down current source is used if the input voltage VIN > high level voltage VENH. If the input
voltage drops below the low level of EN VENL additional the second current source is used. The resulting pull
down current in this case is 100µA.
TH8061 – Datasheet
3901008061
Page 20 of 36
June 2004
Rev 007
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