Switching Characteristics (Ta = 25°C, VCC = 5 V)
TLP554
Characteristic
Propagation Delay Time (L→H)
Symbol
tpLH
Test
Circuit
Test Condition
IF = 7.5→0 mA, RL = 350 Ω
CL = 15 pF
Min
Typ.
Max Unit
―
60
120
Propagation Delay Time (H→L)
Output Rise Time(10-90%)
tpHL
IF = 0→7.5 mA, RL = 350 Ω
1 CL = 15 pF
tr
IF = 7.5→0 mA, RL = 350 Ω
CL = 15 pF
―
60
120
ns
―
30
―
Output Fall Time(90-10%)
Enable Propagation Delay Time
(L→H)
Enable Propagation Delay Time
(H→L)
tf
tELH
tEHL
IF = 0→7.5 mA, RL = 350 Ω
CL = 15 pF
VE = 0.5→3.0 V, RL = 350 Ω
2 IF = 7.5 mA, CL = 15 pF
VE = 3.0→0.5 V, RL = 350 Ω
IF = 7.5 mA, CL = 15 pF
―
30
―
―
25
―
ns
―
25
―
Common Mode Transient
Immunity at Hight Level Outout
(Note 1)
Common Mode Transient
Immunity at Low Level Outout
(Note 2)
CMH
CML
IF = 0 mA, RL = 350 Ω
VCM = 400 V, VO(min) = 2 V
3
IF = 7.5 mA, RL = 350Ω
VCM = 400 V, VO(max) = 0.8 V
1000 10000
―
V/μs
-1000 -10000
―
Note: A ceramic capacitor (0.1 μF) should be connected from pin 8 (VCC) to pin 5 (GND) to stabilize the operation
of the high gain linear amplifier. Failure to provide the bypass may impair the switching property.
The total lead length between capacitor and coupler should not exceed 1 cm.
Note 1: CMH is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in
the logic high state (VO > 2.0 V)
Note 2: CML is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in
the logic low state (VO < 0.8 V).
© 2019
4
Toshiba Electronic Devices & Storage Corporation
2019-06-24