TRC105 데이터 시트보기 (PDF) - RF Monolithics, Inc

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TRC105

300-510 MHz RF Transceiver

RF Monolithics, Inc 

Table 12

IRQCFG0D_TX_IRQ1

0

1

0

1

0

1

Data Mode

Continuous

Continuous

Buffered

Buffered

Packet

Packet

IRQ1

Output

Output

Output

Output

Output

Output

Table 13

3.8 Buffered Clock Output

IRQ0 Interrupt Source

DCLK

DCLK

FIFOFULL

TX_Stop

FIFOFULL

TX_Stop

The buffered clock output is a signal derived from FXTAL. It can be used as a reference clock for the host microcon-

troller and is output on the CLKOUT pin. The OSCFG1B_Clkout_En[7] bit controls the CLKOUT pin. When this

bit is set to 1, CLKOUT is enabled, otherwise it is disabled. The output frequency of CLKOUT is defined by the

value of the OSCFG1B_Clk_freq[6..2] parameter which gives the frequency divider ratio applied to FXTAL. Refer

to Table 42 for programming details. Note: CLKOUT is disabled when the TRC105 is in sleep mode. If sleep

mode is used, the host microcontroller must have provisions to run from its own clock source.

3.9 Packet Data Mode

The TRC105 provides optional on-chip RX and TX packet handling features. These features ease the develop-

ment of packet oriented wireless communication protocols and free the MCU resources for other tasks. The op-

tions include enabling protocols based on fixed and variable packet lengths, data scrambling, CRC checksum cal-

culations and received packet filtering. All the programmable parameters of the Packet data mode are accessible

through the PKTCFG configuration registers of the device. The Packet data mode is enabled when the register bit

MCFG01_Mode[7..6 ] is set to 10 or 11.

The packet handler supports three types of packet formats: fixed length packets, variable length packets, and ex-

tended variable length packets. The PKTCFG1E_Pkt_mode[7] bit selects either the fixed or the variable length

packet formats.

3.9.1 Fixed Length Packet Mode

The fixed length packet mode is selected by setting the PKTCFG1E_Pkt_mode[7] bit to 0. In this mode the

length of the packet is set by the PKTCFG1C_Pkt_len[6..0] register up to the size of the FIFO which has been

selected.

The length stored in this register is the length of the payload which includes the message data bytes and optional

address byte. The fixed length packet format shown in Figure 13 is made up of the following fields:

1. Preamble

2. Start pattern (network address)

3. Node address byte (optional)

4. Data bytes

5. Two-byte CRC checksum (optional)

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Page 19 of 67

TRC105 - 10/16/12

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