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TSA5059AT 데이터 시트보기 (PDF) - Philips Electronics

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TSA5059AT Datasheet PDF : 24 Pages
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Philips Semiconductors
2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer
Product specification
TSA5059A
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
XT/COMP output (pin XT/COMP)
Vo(p-p)
AC output voltage (peak-to-peak value) XCE = 1
400
mV
Input/output and output ports (pins P0, P1, P2 and P3)
IlO
VO(sat)
VIL
VIH
port leakage current
output port saturation voltage
LOW-level input voltage
HIGH-level input voltage
port off; VO = VCC
10
µA
port on; Isink = 10 mA
0.2
0.4
V
1.5
V
3.0
V
ADC input (pin ADC)
ILIH
HIGH-level input leakage current
ILIL
LOW-level input leakage current
VADC = VCC
VADC = 0 V
10
10
µA
µA
Address selection (pin AS)
ILIH
HIGH-level input leakage current
ILIL
LOW-level input leakage current
VAS = VCC
VAS = 0 V
1
mA
0.5
mA
SCL and SDA inputs (pins SCL and SDA)
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
ILIH
HIGH-level input leakage current
ILIL
LOW-level input leakage current
fSCL
SCL clock frequency
2.3
VIH = 5.5 V
VCC = 5.5 V
VCC = 0 V
VIL = 0 V; VCC = 5.5 V 10
1.5
V
V
10
µA
10
µA
µA
400
kHz
SDA output (pin SDA)
VO(ack) output voltage during acknowledge
Isink = 3 mA
0.4
V
Notes
1. Asymmetrical drive on pin RFA or RFB; see Fig.3.
2. Bit PE needs to be set to logic 1 for a frequency higher than 2.3 GHz.
3. The drive level is expected with the crystal at series resonance with a series resistance of 50 . The value will be
different with another crystal.
4. To drive pin XTAL from the pin XT/COMP of another TSA5059A, couple the signal using a capacitor of 1 nF
(to remove the DC level) in series with an 1.2 kresistor (see Fig.5).
2000 Oct 24
13

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