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TSM121 데이터 시트보기 (PDF) - STMicroelectronics

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TSM121 Datasheet PDF : 12 Pages
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TSM121
PRINCIPLE OF OPERATION & APPLICATION HINTS
TSM121 is a one chip solution for all PC SMPS
based on the half bridge topology: it integrates on
the same chip the PWM circuitry (generating the
appropriate signals for the power lines voltage
regulations) as well as the HOUSEKEEPING cir-
cuitry (Over voltage, Over current, Under voltage
protections as well as logic interface for proper
communication with motherboard).
1. PWM Generator and Regulation Circuit:
The PWM Generator circuit is composed of an Er-
ror Amplifier, a Saw Tooth Oscillator, a PWM
Comparator, a Soft Start/Dead Time Control Com-
parator, a D-Latch and two Open Collector Out-
puts.
1.1. Error Amplifier
The Error Amplifier delivers a signal proportional
to the positive and negative inputs voltage differ-
ence (IN+, IN-). The output of this error amplifier
can be compensated thanks to the Feedback (FB)
pin with a compensation network inserted be-
tween the output (FB) and the negative input (IN-)
(see figure 3). This error amplifier should be used
to amplify the error between the middle point of a
resistor bridge connected to the output power
line(s) to be regulated (as an example), and the in-
ternal Voltage Reference Vref2 (as shown on fig-
ure 3).
The resistors should fit the following equation:
Vref2 / (R3 + VR1) = (Vs5 - Vref2) / R1 + (Vs12 -
Vref2) / R2
Recommended values are: R3=4.7k, R1=10k,
R2=39k
VR1 is an optional potentiometer which can be
used to obtain more accurate 5V and 12V lines. Its
recommended range is 0 to 1k.
To compensate the error amplifier, the recom-
mended values are: C1=10nF, R4=43k,
R5=10k. These values need to be adjusted ac-
cording to the whole system.
1.2. Oscillator
The Oscillator frequency is to be fixed with an ex-
ternal capacitor (220pF for 100kHz typical) and
gives a Saw Tooth Oscillation wave form with pos-
itive ramp (see figure 3).
1.3. PWM Comparator
The PWM Comparator takes both outputs from
the Error Amplifier and the Saw Tooth Oscillator.
The resulting signal is a square wave oscillation.
1.4. Soft Start & Dead Time Control
The Soft Start/Dead Time Control Comparator has
two distinct functions.
The Soft Start function ensures that during start up
(power up of the complete SMPS at mains switch
ON) the switching duty cycle starts from 0% for
safe operation during the charging of all output ca-
pacitive loads. This can be achieved by setting an
R7/C2 couple to be connected to the SS/DTC in-
put.
The Soft Start Time is determined by R7 and C2.
In all cases, pay attention to the fact that the by-
pass capacitor C3 will degrade the Soft Start func-
tion. From this point of view, the value of the by-
pass capacitor should be chosen equal or lower
than 100nF.
The Dead Time Control allows to reduce the max-
imum duty cycle limit in order to limit the maximum
output power. This can be achieved by adding a
resistor R6 between SS/DTC input and Vref 2.
This additional resistor will form a resistor bridge
with the previous resistor and lower the maximum
duty cycle.
The maximum duty cycle is set by R6 and R7. The
duty cycle DC fits the following equation:
DC (%) = (100 x R6 / (R6 + R7)) / 2
The PWM comparator and the Soft Start/Dead
Time Ctrl Comparator are ORed to form the input
Clock signal of the D-Latch. Using the Q and !Q
outputs of the D-Latch, and combining them with
some NOR logic will impose proper switching of
the output Open Collector Transistors with Duty
Cycle varying from 0% to 50% max (on each out-
put, and depending on the Error Amplifier inputs &
Soft Start/Dead Time Ctrl conditions).
Figure 4 summarizes all the oscillogram wave
forms of the PWM Circuit.
9/12

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