UDA1340M/N1 데이터 시트보기 (PDF) - Philips Electronics
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UDA1340M/N1 Datasheet PDF : 24 Pages
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Philips Semiconductors
Low-voltage low-power stereo audio
CODEC with DSP features
Preliminary specification
UDA1340
SYSTEM CLOCK FREQUENCY
A 2-bit value (SC1 and SC0) to select the used external
clock frequency (see Table 7).
Table 7 System clock frequency settings
SC1
SC0
0
0
0
1
1
0
1
1
FUNCTION
512fs
384fs
256fs
not used
DATA INPUT FORMAT
A 3-bit value (IF2 to IF0) to select the used data format
(see Table 8).
Table 8 Data input format settings
IF2 IF1 IF0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
FUNCTION
I2S-bus
LSB justified, 16 bits
LSB justified, 18 bits
LSB justified, 20 bits
MSB justified
not used
not used
not used
DC-FILTER
A 1-bit value to enable the digital DC-filter (see Table 9).
Table 9 DC-filtering
DC
0
1
FUNCTION
no DC-filtering
DC-filtering
VOLUME CONTROL
A 6-bit value to program the left and right channel volume
attenuation (VC5 to VC0). The range is 0 dB to −∞ dB in
steps of 1 dB (see Table 10).
Table 10 Volume settings
VC5 VC4 VC3 VC2 VC1 VC0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
0
0
0
0
1
1
:
:
:
:
:
:
1
1
1
0
1
1
1
1
1
1
0
0
1
1
1
1
0
1
1
1
1
1
1
0
1
1
1
1
1
1
VOLUME
(dB)
0
0
−1
−2
:
−58
−59
−60
−∞
−∞
1997 Jul 09
12
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