Philips Semiconductors
96 kHz sampling 24-bit stereo audio ADC
Product specification
UDA1361TS
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Digital input pin (SYSCLK)
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
|ILI|
input leakage current
Ci
input capacitance
Digital 3-level input pins (PWON, SFOR, MSSEL)
VIH
HIGH-level input voltage
VIM
MIDDLE-level input
voltage
VIL
LOW-level input voltage
Digital input/output pins (BCK, WS)
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
|ILI|
input leakage current
Ci
input capacitance
VOH
HIGH-level output voltage IOH = −2 mA
VOL
LOW-level output voltage IOL = 2 mA
Digital output pin (DATAO)
VOH
HIGH-level output voltage IOH = −2 mA
VOL
LOW-level output voltage IOL = 2 mA
Analog
2.0
−
−0.5
−
−
−
−
−
0.9VDD −
0.4VDD −
−0.5
−
2.0
−
−0.5
−
−
−
−
−
0.85VDDD −
−
−
0.85VDDD −
−
−
5.5
V
+0.8
V
1
µA
10
pF
VDD + 0.5 V
0.6VDD V
+0.4
V
5.5
V
+0.8
V
1
µA
10
pF
−
V
0.4
V
−
V
0.4
V
Vref
reference voltage
with respect to VSSA
0.45VDDA 0.5VDDA 0.55VDDA V
RI
input resistance
−
12
−
kΩ
CI
input capacitance
−
20
−
pF
Note
1. All power supply connections must be connected to the same external power supply unit.
2001 Jan 17
8