UPD75048CW 데이터 시트보기 (PDF) - NEC => Renesas Technology
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UPD75048CW Datasheet PDF : 68 Pages
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µPD75048
8. STANDBY FUNCTIONS
The µPD75048 has two different standby modes (STOP mode and HALT mode) to reduce the power
consumption while waiting for program execution.
Table 8-1 Each Status in Standby Mode
Setting Instruction
System Clock for Setting
Operation Clock Generator
Status
Basic Interval
Timer
Serial Interface
Timer/Event
Counter
Watch Timer
A/D Convertor
Multi Function
Timer
EEPROM
External Interrupt
CPU
Release Signal
STOP Mode
STOP instrtuction
Can be set only when operating on
the main system clock
Only the main system clock stops its
operation
No operation
Can operate only when the external
SCK input is selected for the serial
clock
Can operate only when the TI0 pin
input is selected for the count clock
Can operate when fXT is selected as
the count clock
No operation
No operation
HALT Mode
HALT Instruction
Can be set either with the main
system clock or the subsystem clock
Only the CPU clock Φ stops its
operation (oscillation continues)
Operates only when main system
clock oscillates (Sets IRQBT at
reference time interval)
Operates only when external SCK
input is selected as serial clock, or
when main system clock oscillates
Operates only when TI0 pin input is
selected as count clock, or when
main system clock oscillates
Can operate
Can operate *
Can operate *
No operation
INT1, INT2, and INT4 can operate.
Only INT0 can not operate.
No operation
An interrupt request signal from a
hardware whose operation is
enabled by the interrupt enable flag
or the RESET input.
Can operate *
An interrupt request signal from a
hardware whose operation is
enabled by the interrupt enable flag
or the RESET input.
*: Operation is possible only when the main system clock is operating.
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