UPD77113A 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD77113A

16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS

NEC => Renesas Technology 

µPD77113A, 77114

6. STANDBY MODES

Two standby modes are available. By executing the corresponding instruction, each mode is set and the power

consumption can be reduced.

6.1 HALT Mode

To set this mode, execute the HALT instruction. In this mode, functions other than clock circuit and PLL are

stopped to reduce the current consumption.

To release the HALT mode, use an interrupt or hardware reset. When releasing the HALT mode using an

interrupt, the contents of the internal registers and memory are retained. It takes several 10 system clocks to release

the HALT mode when the HALT mode is released using an interrupt.

In the HALT Mode, the clock circuit of the µPD77111 family supplies the following clock as the internal system

clock. The clock output from the CLKOUT pin is also as follows.

The clock output from the CLKOUT pin, however, has a high-level width that is equivalent to 1 cycle of the normal

operation (i.e., the duty factor is not 50%).

• µPD77113A, 77114: 1/l of internal system clock (l = integer from 1 to 16, specified by mask option)

6.2 STOP Mode

To set this mode, execute the STOP instruction. In this mode, all the functions, including the clock circuit and

PLL, are stopped and the power consumption is minimized with only leakage current flowing.

To release the STOP mode, use hardware reset or WAKEUP pin.

When releasing the STOP mode by using the WAKEUP pin, the contents of the internal registers and memory are

retained, but it takes several 100 µs to release the mode.

The WAKEUP pin is multiplexed with the INT4 pin. Usually, this pin functions as an interrupt pin, but functions as

the WAKEUP pin when it is asserted active in the STOP mode. Whether the WAKEUP pin is used to release the

STOP mode is selected by mask option. For details, refer to 8.2 WAKEUP Function.

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Data Sheet U14373EJ3V0DS

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