UPD780974 데이터 시트보기 (PDF) - NEC => Renesas Technology
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UPD780974 Datasheet PDF : 301 Pages
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LIST OF TABLES (1/2)
Table No.
Title
Page
2-1. Pin Input/Output Circuit Types .......................................................................................................... 38
3-1. Internal Memory Capacity ................................................................................................................. 43
3-2. Vector Table ...................................................................................................................................... 43
3-3. Internal High-Speed RAM Capacity .................................................................................................. 44
3-4. Internal High-Speed RAM Area ........................................................................................................ 48
3-5. Special Function Register List .......................................................................................................... 52
5-1. Port Functions ................................................................................................................................... 74
5-2. Port Configuration ............................................................................................................................. 75
5-3. Port Mode Register and Output Latch Settings when Using Alternate Functions ............................. 85
6-1. Clock Generator Configuration ......................................................................................................... 89
6-2. Relation between CPU Clock and Minimum Instruction Execution Time .......................................... 90
6-3. Maximum Time Required for Switching CPU Clock .......................................................................... 96
7-1. Timer/Event Counter Operations ...................................................................................................... 100
7-2. Timer 0 Configuration ....................................................................................................................... 102
8-1. Timer 1 Configuration ....................................................................................................................... 112
9-1. Timers 2 and 3 Configurations .......................................................................................................... 121
10-1.
10-2.
10-3.
Interval Timer Interval Time .............................................................................................................. 134
Watch Timer Configuration ............................................................................................................... 134
Interval Timer Interval Time .............................................................................................................. 136
11-1.
11-2.
11-3.
11-4.
11-5.
Watchdog Timer Runaway Detection Time ....................................................................................... 140
Interval Time ..................................................................................................................................... 140
Watchdog Timer Configuration ......................................................................................................... 141
Watchdog Timer Runaway Detection Time ....................................................................................... 143
Interval Timer Interval Time .............................................................................................................. 144
12-1. Clock Output Control Circuit Configuration ....................................................................................... 145
13-1. A/D Converter Configuration ............................................................................................................. 150
14-1.
14-2.
14-3.
14-4.
UART Configuration .......................................................................................................................... 166
Relation between 5-bit Counter’s Source Clock and “n” Value ......................................................... 175
Relation between Main System Clock and Baud Rate ..................................................................... 176
Causes of Receive Errors ................................................................................................................. 181
15-1. SIO3 Configuration ........................................................................................................................... 184
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