CXA3017R 데이터 시트보기 (PDF) - Sony Semiconductor

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CXA3017R

Decoder/Driver/Timing Generator for Color LCD Panels

Sony Semiconductor 

CXA3017R

Pin Symbol Pin voltage

No.

58 RESET

—

Equivalent circuit

VDD1

58

2µA

300

1k

GND1

Description

TG block system reset pin.

The system is reset when this

pin is connected to GND.

Connect a capacitor between

this pin and GND.

59 Y IN

1.6V

61 SYNC IN

1.6V

62 VSEP TC

1.7V

63 F0 ADJ

1.5V

64 GND1

0V

60 TEST2

0V

VCC1

59

GND1

Y signal input.

1k

The standard signal input level

is 0.5Vp-p (100% white level

from the sync tip).

Input at low impedance (75Ω

20µA

or less).

VDD1

61

GND1

Sync input.

1k

Normally inputs the Y signal.

1k

The standard signal input level

is 0.5Vp-p (100% white level

500

0.6µA

12µA

from the sync tip).

Input at low impedance (75Ω

or less).

VDD1

62

GND1

VCC1

63

GND1

500

1k

1k

20µA

20µA

200

5p

500 5p

500

–8–

Capacitor connection for

vertical sync separation.

Filter reference current

generation.

Connect resistance of 15 kΩ

between this pin and GND1 to

adjust the internal filters using

the outflow current value.

Leave this pin open when

using Y/C or Y/color difference

mode.

3.0V GND.

Test. Connect to GND.

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