W83L784 데이터 시트보기 (PDF) - Winbond

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W83L784

Winbond H/W Monitoring IC

Winbond 

W83L784R

50KΩ

Vin = VCC × 50 K Ω + 34 K Ω ≅ 2.98V

where VCC is set to 5V.

Preliminary

6.3.2 Power good for 3V and 5V

On power up, once VCC(5V) reaches 1V, RESET# will be a logic low. As 3V and VCC(5V)

rise, RESET# remains asserted. If 3V and VCC(5V) both exceed the reset threshold, RESET

becomes a logic high after a time equal to the reset pulse width (tRST, typically 200ms).(Figure 11).

If a power fail or a brownout happens(i.e. 3V or VCC(5V) drops below the threshold), RESET# output

is asserted. As long as the 3V and VCC(5V) remain below the reset threshold, RESET# output

remains asserted. Therefore, a brownout condition that interrupts a previously initiated reset pulse

causes an additional 200ms delay from the time the latest interruption occurred. On power-on, once

3Vor VCC(5V) drops below the reset threshold, RESET# are guaranteed to be asserted for VCC ≥ 1V.

3.3V

4

3

2

1

0

VCC

5

4

3

2

1

0

RESET

5

0

VRST

VRST

VRST

VRST

tRST

VCC

5

4

3

2

1

0

5

RESET

0

Figure 11

The time of voltage over 4V

is less than tRST

VRS

VRS

VRS

T

T

T

tRST

tRST

Confidential, For Beta-site Only

-16 -

Publication Release Date: Sep.

1999

Revision 0.54

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