WM8580 데이터 시트보기 (PDF) - Wolfson Microelectronics plc
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WM8580 Datasheet PDF : 97 Pages
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Production Data
CONTROL INTERFACE TIMING – 3-WIRE MODE
t CSS
CSB
t SCY
SCLK
SDIN
SDO
t DSU
t
DHO
t DL
Figure 4 SPI Compatible Control Interface Input Timing
WM8580
t CSH
t SCS
t CSS
LSB
LSB
Test Conditions
AVDD, PVDD = 5V,DVDD = 3.3V, AGND, PGND,DGND = 0V, TA = +25oC, fs = 48kHz, MCLK and ADCMCLK = 256fs unless
otherwise stated
PARAMETER
SCLK rising edge to CSB rising edge
SCLK pulse cycle time
SCLK duty cycle
SDIN to SCLK set-up time
SDIN hold time from SCLK rising edge
SDO propagation delay from SCLK rising
edge
CSB pulse width high
CSB rising/falling to SCLK rising
SCLK glitch suppression
SYMBOL
tSCS
tSCY
tDSU
tDHO
tDL
tCSH
tCSS
tps
MIN
60
80
40/60
20
20
20
20
2
TYP
MAX
UNIT
ns
ns
60/40
ns
ns
ns
5
ns
ns
ns
8
ns
Table 6 3-Wire SPI Compatible Control Interface Input Timing Information
w
PD Rev 4.3 August 2007
15
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