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X28C512DM-25 데이터 시트보기 (PDF) - Xicor -> Intersil
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X28C512DM-25
5 Volt, Byte Alterable E
Xicor -> Intersil
X28C512DM-25 Datasheet PDF : 25 Pages
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X28C512/X28C513
WRITE CYCLE LIMITS
Symbol
t
WC(4)
t
AS
t
AH
t
CS
t
CH
t
CW
t
OES
t
OEH
t
WP
t
WPH
t
DV
t
DS
t
DH
t
DW
t
BLC
Parameter
Write Cycle Time
Address Setup Time
Address Hold Time
Write Setup Time
Write Hold Time
CE
Pulse Width
OE
HIGH Setup Time
OE
HIGH Hold Time
WE
Pulse Width
WE
HIGH Recovery
Data Valid
Data Setup
Data Hold
Delay to Next Write
Byte Load Cycle
WE
Controlled Write Cycle
ADDRESS
CE
tAS
tAH
tCS
Min.
0
50
0
0
100
10
10
100
100
50
0
10
0.2
tWC
tCH
OE
WE
DATA IN
DATA OUT
tOES
tDV
tOEH
tWP
DATA VALID
tDS
tDH
HIGH Z
Max.
10
1
100
Units
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
µ
s
ns
ns
µ
s
µ
s
3856 PGM T10.2
3856 FHD F17
Notes:
(4) t
WC
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time
the device requires to complete the internal write operation.
13
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