XRT84L38 데이터 시트보기 (PDF) - Exar Corporation

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XRT84L38

OCTAL T1/E1/J1 FRAMER

Exar Corporation 

XRT84L38

OCTAL T1/E1/J1 FRAMER

REV. 1.0.1

FRAMING SELECT REGISTER (FSR) (INDIRECT ADDRESS = 0XN0H, 0X07H) ............................................... 335

10.3 HOW TO CONFIGURE THE FRAMER TO APPLY DATA AND SIGNALING CONDITIONING TO RECEIVED DS1

PAYLOAD DATA ON A PER-CHANNEL BASIS ......................................................................................... 336

RECEIVE CHANNEL CONTROL REGISTER (RCCR) (INDIRECT ADDRESS = 0XN2H, 0X60H - 0X7FH) ............ 337

RECEIVE USER IDLE CODE REGISTER (UCR) (INDIRECT ADDRESS = 0XN02H, 0X80H - 0X97H)................ 337

10.4 HOW TO CONFIGURE THE XRT84L38 FRAMER TO APPLY ZERO CODE SUPPRESSION TO RECEIVED DS1

PAYLOAD DATA ON A PER-CHANNEL BASIS ......................................................................................... 337

RECEIVE CHANNEL CONTROL REGISTER (RCCR) (INDIRECT ADDRESS = 0XN2H, 0X60H - 0X7FH) ............ 338

10.5 HOW TO CONFIGURE THE XRT84L38 FRAMER TO EXTRACT ROBBED-BIT SIGNALING INFORMATION

338

10.5.1 CONFIGURE THE FRAMER TO RECEIVE AND EXTRACT ROBBED-BIT SIGNALING....................................... 338

RECEIVE SIGNALING CONTROL REGISTER (RSCR) (INDIRECT ADDRESS = 0XN2H, 0XA0H - 0XB7H) ......... 339

FRAMER INTERRUPT ENABLE REGISTER (FIER) (INDIRECT ADDRESS = 0XNAH, 0X05H) ............................ 339

BLOCK INTERRUPT ENABLE REGISTER (BIER) (INDIRECT ADDRESS = 0XNAH, 0X00H) ............................... 339

FRAMER INTERRUPT STATUS REGISTER (FISR) (INDIRECT ADDRESS = 0XNAH, 0X04H) ............................ 340

SIGNALING CHANGE REGISTERS (SCR) (INDIRECT ADDRESS = 0XN0H, 0X0DH - 0X0FH).......................... 340

10.5.1.1 STORE SIGNALING BITS INTO RSRA REGISTER ARRAY ..................................................................................... 340

RECEIVE SIGNALING REGISTER ARRAY (RSRA) (INDIRECT ADDRESS = 0XN4H, 0X00H - 0X17H) .............. 341

10.5.1.2 OUTPUTTING SIGNALING BITS THROUGH RXSIG_N PIN ...................................................................................... 341

RECEIVE INTERFACE CONTROL REGISTER (TICR) (INDIRECT ADDRESS = 0XN0H, 0X20H) ......................... 341

FIGURE 116. TIMING DIAGRAM OF THE RXSIG_N OUTPUT PIN ....................................................................................................... 342

RECEIVE SIGNALING CONTROL REGISTER (RSCR) (INDIRECT ADDRESS = 0XN2H, 0XA0H - 0XB7H) ......... 342

10.5.1.3 SEND SIGNALING DATA THROUGH RXSER_N PIN............................................................................................... 342

10.5.1.4 SIGNALING DATA SUBSTITUTION ....................................................................................................................... 342

RECEIVE SIGNALING CONTROL REGISTER (RSCR) (INDIRECT ADDRESS = 0XN2H, 0XA0H - 0XB7H) ......... 342

RECEIVE SUBSTITUTION SIGNALING REGISTER (RSSR) (INDIRECT ADDRESS = 0XN02H, 0X80H - 0X97H) . 343

RECEIVE SIGNALING CONTROL REGISTER (RSCR) (INDIRECT ADDRESS = 0XN2H, 0X40H - 0X57H) .......... 344

10.6 HOW TO CONFIGURE THE FRAMER TO DETECT ALARMS AND ERROR CONDITIONS...................... 344

10.6.1 HOW TO CONFIGURE THE FRAMER TO DETECT AIS ALARM........................................................................... 344

ALARM GENERATION REGISTER (AGR) (INDIRECT ADDRESS = 0XN0H, 0X08H) ......................................... 345

ALARM AND ERROR INTERRUPT ENABLE REGISTER (AEIER) (INDIRECT ADDRESS = 0XNAH, 0X03H)......... 345

BLOCK INTERRUPT ENABLE REGISTER (BIER) (INDIRECT ADDRESS = 0XNAH, 0X01H) .............................. 345

ALARM AND ERROR STATUS REGISTER (AESR) (INDIRECT ADDRESS = 0XNAH, 0X02H) ............................ 346

ALARM AND ERROR STATUS REGISTER (AESR) (INDIRECT ADDRESS = 0XNAH, 0X02H) ........................... 346

10.6.2 HOW TO CONFIGURE THE FRAMER TO DETECT RED ALARM ......................................................................... 346

ALARM AND ERROR INTERRUPT ENABLE REGISTER (AEIER) (INDIRECT ADDRESS = 0XNAH, 0X03H)......... 347

BLOCK INTERRUPT ENABLE REGISTER (BIER) (INDIRECT ADDRESS = 0XNAH, 0X01H) ............................... 347

ALARM AND ERROR STATUS REGISTER (AESR) (INDIRECT ADDRESS = 0XNAH, 0X02H) ............................ 347

ALARM AND ERROR STATUS REGISTER (AESR) (INDIRECT ADDRESS = 0XNAH, 0X02H) ............................ 348

10.6.3 HOW TO CONFIGURE THE FRAMER TO DETECT YELLOW ALARM ................................................................. 348

ALARM AND ERROR INTERRUPT ENABLE REGISTER (AEIER) (INDIRECT ADDRESS = 0XNAH, 0X03H).......... 348

BLOCK INTERRUPT ENABLE REGISTER (BIER) (INDIRECT ADDRESS = 0XNAH, 0X01H) ............................... 348

ALARM AND ERROR STATUS REGISTER (AESR) (INDIRECT ADDRESS = 0XNAH, 0X02H) ............................ 349

ALARM AND ERROR STATUS REGISTER (AESR) (INDIRECT ADDRESS = 0XNAH, 0X02H) ........................... 349

10.6.4 HOW TO CONFIGURE THE FRAMER TO DETECT BIPOLAR VIOLATION .......................................................... 349

ALARM AND ERROR INTERRUPT ENABLE REGISTER (AEIER) (INDIRECT ADDRESS = 0XNAH, 0X03H)......... 350

BLOCK INTERRUPT ENABLE REGISTER (BIER) (INDIRECT ADDRESS = 0XNAH, 0X01H) ............................... 350

ALARM AND ERROR STATUS REGISTER (AESR) (INDIRECT ADDRESS = 0XNAH, 0X02H) ........................... 350

10.6.5 HOW TO CONFIGURE THE FRAMER TO DETECT LOSS OF SIGNAL ................................................................ 350

ALARM AND ERROR INTERRUPT ENABLE REGISTER (AEIER) (INDIRECT ADDRESS = 0XNAH, 0X03H).......... 351

BLOCK INTERRUPT ENABLE REGISTER (BIER) (INDIRECT ADDRESS = 0XNAH, 0X01H) ............................... 351

ALARM AND ERROR STATUS REGISTER (AESR) (INDIRECT ADDRESS = 0XNAH, 0X02H) ........................... 351

11.0 E1 TRANSMIT FRAMER BLOCK ...................................................................................................... 352

11.1 HOW TO CONFIGURE XRT84L38 TO OPERATE IN E1 MODE.................................................................. 352

CLOCK SELECT REGISTER (CSR) (INDIRECT ADDRESS = 0XN0H, 0X00H) .................................................. 352

11.2 HOW TO CONFIGURE THE FRAMER TO TRANSMIT AND RECEIVE DATA IN E1 FRAMING FORMAT 352

11.2.1 HOW TO CONFIGURE THE FRAMER TO CHOOSE FAS SEARCHING ALGORITHM ......................................... 352

FRAMING SELECT REGISTER (FSR) (INDIRECT ADDRESS = 0XN0H, 0X07H) .............................................. 353

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