MSM6255 데이터 시트보기 (PDF) - Oki Electric Industry

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MSM6255

DOT MATRIX LCD CONTROLLER

Oki Electric Industry 

¡ Semiconductor

– Relation Between Reference Clock (fs) and External Clock

DIV

XT

Q

XT

T

MSM6255

fs

XT

fs

(DIV = 1)

fs functions as a dot clock in LCDC and the dot counter inside the IC is counted up at the trailing

edge of fs.

The dot counter operates as a N-ary counter on a basis of HP and generates the character clocks

(CHf).

(Refer to the time charts Fig. 7 - 9 and Fig. 14.)

– Access to the Display RAM

In writing/reading the data to/from the display RAM, DIEN should be low level. By setting

DIEN signal at low level, the address from the CPU are output from MA0 - MA15, and this

enables the access to the display RAM.

There are three methods of accessing display RAM from the CPU.

(1) Direct access from CPU

Display RAM is accessed directly from the CPU, irrespective of the condition of MSM6255

(refresh cycle or not).

In this method, the RAM address changes to the CPU address when the display is on the

screen. So, frequent access to the RAM causes flickering on the screen.

(2) Access while BUSY signal is high

BUSY signal indicates the period when the data transfer stops, and BUSY signal is set high

when the data transfer stops. The period when BUSY signal is high corresponds to that of

seven characters’. If display RAM is accesed during this period (when BUSY is high), the

display on the screen does not flicker.

Note: This method is effective when the size of screen is small. In the case of big size

screen, 640 x 200 dots, 1character needs approx. 1.6ms. So, in this case, the period

when BUSY is at high level is 11.2ms, which is impossible to write or read a lot of

data.

(3) Synchronized access (only for operating the IC by external clock)

Refresh cycle and CPU cycle are alternately performed. So, there is not flickering on the

screen and there is no need to sense the BUSY signal.

When using this method, however, some external circuitry is necessary. The timing chart

of this method is described in the Figure 10 below.

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