AD9281 데이터 시트보기 (PDF) - Analog Devices

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AD9281

Dual Channel 8-Bit Resolution CMOS ADC

Analog Devices 

AD9281

0.1␮F

IREFT

10␮F 0.1␮F

0.1␮F

1.0␮F

IREFB

VREF

0.1␮F

REFSENSE

10k⍀

AVSS

10k⍀

ADC

CORE

1V

QREFT

0.1␮F

0.1␮F

10␮F

QREFB

0.1␮F

INTERNAL

CONTROL

LOGIC

AD9281

Figure 26. Reference Buffer Equivalent Circuit and

External Decoupling Recommendation

For best results in both noise suppression and robustness

against crosstalk, the 4-capacitor buffer decoupling arrangement

shown in Figure 26 is recommended. This decoupling should

feature chip capacitors located close to the converter IC. The

capacitors are connected to either IREFT/IREFB or QREFT/

QREFB. A connection to both sides is not required.

COMMON-MODE PERFORMANCE

Attention to the common-mode point of the analog input volt-

age can improve the performance of the AD9281. Figure 27

illustrates THD as a function of common-mode voltage (center

point of the analog input span) and power supply.

Inspection of the curves will yield the following conclusions:

1. An AD9281 running with AVDD = 5 V is the easiest to

drive.

2. Differential inputs are the most insensitive to common-mode

voltage.

3. An AD9281 powered by AVDD = 3 V and a single ended

input, should have a 1 V span with a common-mode voltage

of 0.75 V.

–3

–13

–23

–33

2V

–43

–53

1V

–63

–73

–0.5

0

0.5

1

1.5

CML – V

a. Differential Input, 3 V Supplies

–15

2V

–25

–35

–45

1V

–55

–65

–0.5

0

0.5

1

1.5

CML – V

c. Single-Ended Input, 3 V Supplies

–35

–15

–40

–45

–25

–50

2V

–55

1V

–60

–65

–35

2V

1V

–45

–55

–70

–0.5

0

0.5

1

1.5

CML – V

2

2.5

b. Differential Input, 5 V Supplies

–65

–0.5

0

0.5

1

1.5

2

2.5

CML – V

d. Single-Ended Input, 5 V Supplies

Figure 27. THD vs. CML Input Span and Power Supply (Analog Input = 1 MHz)

REV. E

–11–

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