80960MC(2004) 데이터 시트보기 (PDF) - Intel

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80960MC
(Rev.:2004)

EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT AND MEMORY MANAGEMENT UNIT

Intel 

80960MC

2.8 AC Specifications

This section describes the AC specifications for the

80960MC pins. All input and output timings are spec-

ified relative to the 1.5 V level of the rising edge of

CLK2. For output timings the specifications refer to

the time it takes the signal to reach 1.5 V.

For input timings the specifications refer to the time

at which the signal reaches (for input setup) or

leaves (for hold time) the TTL levels of LOW (0.8 V)

or HIGH (2.0 V). All AC testing should be done with

input voltages of 0.4 V and 2.4 V, except for the

clock (CLK2), which should be tested with input

voltages of 0.45 V and 0.55 VCC.

EDGE

A

B

C

D

A

B

C

CLK2

0.8V

1.5V

OUTPUTS:

LAD 31:0

ADS

W/R, DEN

BE3:0

HLDA/HOLDR

CACHE

LOCK, INTA

1.5V

1.5V

T6

T9

1.5V VALID OUTPUT 1.5V

1.5V

T8

T8

T13

T14

ALE

DT/R

INPUTS:

LAD31:0

BADAC

IAC/INT0, INT1

INT2/INTR, INT3

HOLD, HLDAR

LOCK

READY

1.5V

1.5V

T7

T6

1.5V

VALID OUTPUT

T9

1.5V

T10 T11

2.0V 2.0V

0.8V 0.8V

T12 T11

2.0V 2.0V

0.8V 0.8V

VALID INPUT

Figure 13. Drive Levels and Timing Relationships for 80960MC Signals

18

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