80960KB 데이터 시트보기 (PDF) - Intel

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80960KB

EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT

Intel 

80960KB

ONE OF FOUR

LOCAL

REGISTER SETS

REGISTER

CACHE

LOCAL REGISTER SET

R0

31

0 R15

Figure 4. Multiple Register Sets Are Stored On-Chip

1.1.7 Floating-Point Arithmetic

In the 80960KB, floating-point arithmetic has been

made an integral part of the architecture. Having the

floating-point unit integrated on-chip provides two

advantages. First, it improves the performance of the

chip for floating-point applications, since no

additional bus overhead is associated with

floating-point calculations, thereby leaving more time

for other bus operations such as I/O. Second, the

cost of using floating-point operations is reduced

because a separate coprocessor chip is not

required.

The 80960KB floating-point (real-number) data types

include single-precision (32-bit), double-precision

(64-bit) and extended precision (80-bit) floating-point

numbers. Any registers may be used to execute

floating-point operations.

Table 3. Sample Floating-Point Execution Times

(µs) at 25 MHz

Function

Add

Subtract

Multiply

Divide

32-Bit

0.4

0.4

0.7

1.3

64-Bit

0.5

0.5

1.3

2.9

Square Root

3.7

Arctangent

10.1

Exponent

11.3

Sine

15.2

Cosine

15.2

3.9

13.1

12.5

16.6

16.6

1.1.8 High Bandwidth Local Bus

The processor provides hardware support for both

mandatory and recommended portions of IEEE

Standard 754 for floating-point arithmetic, including

all arithmetic, exponential, logarithmic and other

transcendental functions. Table 3 shows execution

times for some representative instructions.

The 80960KB CPU resides on a high-bandwidth

address/data bus known as the local bus (L-Bus).

The L-Bus provides a direct communication path

between the processor and the memory and I/O

subsystem interfaces. The processor uses the L-Bus

to fetch instructions, manipulate memory and

respond to interrupts. L-Bus features include:

• 32-bit multiplexed address/data path

• Four-word burst capability which allows transfers

from 1 to 16 bytes at a time

• High bandwidth reads and writes with

66.7 MBytes/s burst (at 25 MHz)

Table 4 defines L-bus signal names and functions;

Table 5 defines other component-support signals

such as interrupt lines.

6

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