ADP3110A
ELECTRICAL CHARACTERISTICS (Note 4) (VCC = 12 V, TA = 0°C to +85°C, TJ = 0°C to +125°C unless otherwise noted.)
Characteristic
Symbol
Condition
Min
Typ
Max Unit
Supply
Supply Voltage Range
Supply Current
OD Input
VCC
−
4.6
−
13.2
V
ISYS
BST = 12 V, IN = 0 V
−
0.7
5.0
mA
Input Voltage High
VOD_HI
−
2.0
−
−
V
Input Voltage Low
VOD_LO
−
−
−
0.8
V
Hysteresis
−
−
400
−
mV
Input Current
No internal pullup or pulldown resistors −1.0
−
+1.0
mA
PWM Input
Input Voltage High
VPWM_HI
−
Input Voltage Low
VPWM_LO
−
Hysteresis
−
−
2.0
−
−
V
−
−
0.8
V
−
400
−
mV
Input Current
−
No internal pullup or pulldown resistors −1.0
−
+1.0
mA
High−Side Driver
Output Resistance, Sourcing Current
−
BST − SW = 12 V
−
2.2
3.4
W
Output Resistance, Sinking Current
−
BST − SW = 12 V
−
1.0
1.8
W
Output Resistance, Unbiased
−
BST − SW = 0 V
−
15
−
kW
Transition Times
trDRVH
tfDRVH
BST − SW = 12 V, CLOAD = 3.0 nF
(See Figure 3)
−
20
55
ns
11
45
Propagation Delay Times (Note 5)
tpdhDRVH
tpdlDRVH
BST − SW = 12 V, CLOAD = 3.0 nF
BST − SW = 12 V, CLOAD = 3.0 nF
(See Figure 3)
32
45
70
ns
25
35
SW Pulldown Resitance
Low−Side Driver
tpdlOD
tpdhOD
−
(See Figure 2)
(See Figure 2)
SW to PGND
20
35
25
55
−
15
−
kW
Output Resistance, Sourcing Current
−
−
1.8
3.4
W
Output Resistance, Sinking Current
−
−
1.0
1.8
W
Output Resistance, Unbiased
Transition Times
Propagation Delay Times (Note 5)
−
trDRVL
tfDRVL
tpdhDRVL
tpdlDRVL
VCC = PGND
CLOAD = 3.0 nF, (See Figure 3)
CLOAD = 3.0 nF, (See Figure 3)
(Note 6, tpdhDRVL only)
−
15
−
kW
−
16
50
ns
11
30
−
12
35
ns
15
40
Timeout Delay
Undervoltage Lockout
tpdlOD
tpdhOD
−
(See Figure 2)
(See Figure 2)
DRVH − SW = 0
20
35
20
35
−
85
−
ns
UVLO Startup
−
−
3.9
4.3
4.5
V
UVLO Shutdown
−
−
3.7
4.1
4.3
V
Hysteresis
−
−
0.1
0.2
0.4
V
4. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC).
5. For propagation delays, “tpdh” refers to the specified signal going high; “tpdl” refers to it going low.
6. Guaranteed by design; not tested in production.
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