AT90USB82 데이터 시트보기 (PDF) - Unspecified

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AT90USB82

8-bit Microcontroller with 8/16K Bytes of ISP Flash and USB Controller

Unspecified 

The 32 general purpose working registers, 64 I/O registers, and the 512 bytes of internal data

SRAM in the AT90USB82/162 are all accessible through all these addressing modes. The Reg-

ister File is described in “General Purpose Register File” on page 11.

Figure 5-2. Data Memory Map

Data Memory

32 Registers

64 I/O Registers

160 E xt I/O Reg.

$0000 - $001F

$0020 - $005F

$0060 - $00FF

$0100

Internal S RAM

(512 x 8)

$2FF

5.2.1

Data Memory Access Times

This section describes the general access timing concepts for internal memory access. The

internal data SRAM access is performed in two clkCPU cycles as described in Figure 5-3.

Figure 5-3. On-chip Data SRAM Access Cycles

T1

T2

T3

clk

CPU

Address

Data

WR

Data

RD

Compute Address

Address valid

Memory Access Instruction

Next Instruction

5.3 EEPROM Data Memory

The AT90USB82/162 contains 512 bytes of data EEPROM memory. It is organized as a sepa-

rate data space, in which single bytes can be read and written. The EEPROM has an endurance

of at least 100,000 write/erase cycles. The access between the EEPROM and the CPU is

described in the following, specifying the EEPROM Address Registers, the EEPROM Data Reg-

ister, and the EEPROM Control Register.

18 AT90USB82/162

7707F–AVR–11/10

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