CMI9761A 데이터 시트보기 (PDF) - Unspecified

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CMI9761A

6 Channel AC’97 2.3 Audio Codec

Unspecified 

CMI9761A/9761A+ DataSheet

2004/02/09, Rev 1.2

8.4 Data Output and Input Timing

Parameter

Symbol Minimum Typical Maximum Units

Output valid delay from rising

edge of BIT_CLK

Tco

-

-

15.0 ns

Note: 50pF external load.

Parameter

Symbol Minimum Typical Maximum Units

Input Setup to falling edge of

BIT_CLK

Tsetup 10.0

-

-

ns

Input Hold from falling edge of

BIT_CLK

Thold 10.0

-

-

ns

Parameter

Symbol Minimum Typical Maximum Units

BIT_CLK combined rise or fall

-

-

-

7.0 ns

plus flight time

SDATA combined rise or fall

-

-

-

7.0 ns

plus flight time

Note: Combined rise or fall plus flight times are provided for worst case

scenario modeling purposes.

Figure 7. Data Output and Input Timing Diagram

Copyright 2003-2004 © C-Media Electronics Inc.

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