F71805FG 데이터 시트보기 (PDF) - Feature Integration Technology Inc.

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F71805FG

Super H/W Monitor + LPC IO

Feature Integration Technology Inc. 

F71805

(3). If both (1) and (2) are not true and KEEP_STOP (see INDEX 60h) is set to 0:

(a). When PWMOUT duty-cycle decrease to STOP_DUTY(≠ 00h), obviously the duty-cycle will

decrease to 00h next, F71805 will keep duty-cycle at 00h 3 seconds1. After that, F71805

starts to compare current fan count and expected count in order to increase or decrease its

duty-cycle. This ensures that if there is any glitch during the 3 seconds1 period, F71805 will

ignore it.

(b). When PWMOUT duty-cycle increase from 00h to START_DUTY(≠ 00h), F71805 also will

keep duty-cycle at START_DUTY 3 seconds1. After that, F71805 starts to compare current

fan count and expected count in order to increase or decrease its duty-cycle. This ensures

that if there is any glitch during the 3 seconds1 period, F71805 will ignore it.

Note 1: The period of HOLD_DUTY_TIME can be programmed at INDEX 67h of FAN1.

START

STOP

START

STOP

6.2.6 FAN_FAULT#

Fan_Fault will be asserted ( PME# Pin 81) when the fan speed doesn’t meet the expected fan speed

within a programmable period (default is 3 seconds) or when PWMOUT duty-cycle is 100%.

17

Dec., 2006

V0.25P

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