FM25C160B-G(2018) 데이터 시트보기 (PDF) - Cypress Semiconductor

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FM25C160B-G
(Rev.:2018)

16-Kbit (2K × 8) Serial (SPI) F-RAM

Cypress Semiconductor 

FM25C160B

Power Cycle Timing

Over the Operating Range

Parameter

Description

Min

tPU

Power-up VDD(min) to first access (CS LOW)

1

tPD

Last access (CS HIGH) to power-down (VDD(min))

0

tVR [12]

VDD power-up ramp rate

30

tVF [12]

VDD power-down ramp rate

30

Figure 15. Power Cycle Timing

VDD

VDD(min)

tVR

tPU

CS

VDD(min)

tVF

tPD

Max Unit

–

ms

–

µs

–

µs/V

–

µs/V

Note

12. Slope measured at any point on VDD waveform.

Document Number: 001-84472 Rev. *I

Page 15 of 21

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