HMS81016E 데이터 시트보기 (PDF) - Hynix Semiconductor

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HMS81016E

8-BIT SINGLE-CHIP MICROCONTROLLERS

Hynix Semiconductor 

HMS81004E/08E/16E/24E/32E

10. CLOCK GENERATOR

Clock generating circuit consists of Clock Pulse Generator

(C.P.G), Prescaler, Basic Interval Timer (B.I.T) and Watch

Dog Timer. The clock applied to the Xin pin divided by

two is used as the internal system clock.

Prescaler consist of 12-bit binary counter. The clock sup-

plied from oscillation circuit is input to prescaler(fex)

The divided output from each bit of prescaler is provided

to periphera hardwarel

Clock to peripheral hardware can be stopped by bit4 (EN-

PCK) of CKCTLR Register. ENPCK is set to “1” in reset

state.

Clock Control Register (W)

CKCTLR 7 6 5 4

ADDRESS : 0C7H

INITIAL VALUE : --110111b

3 210

ENPCK 0: Stopped

1: Provided

OSC fex

CIRCUIT

CLOCK PULSE

GENERATOR

Internal system clock (CPU clock)

PRESCALER

PS0 PS1 PS2 PS3 PS4 PS5 PS6 PS7 PS8 PS9 PS10 PS11 PS12

÷1 ÷2 ÷4 ÷8 ÷16 ÷32 ÷64 ÷128 ÷256 ÷512 ÷1024 ÷2048 ÷4096

Peripheral clock

fEX(MHz)

PS0 PS1 PS2 PS3 PS4 PS5 PS6 PS7 PS8 PS9 PS10 PS11 PS12

Frequency 4M

2M

1M

4

period 250n 500n 1u

500K

2u

250K

4u

125K

8u

62.5K 31.25K 15.63K 7.183K 3.906K 1.953K 0.976K

16u

32u

64u 128u 256u 512u 1024u

Figure 10-1 Block diagram of Clock Generator

JUNE 2001 Ver 1.00

33

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