HMS87C4260 데이터 시트보기 (PDF) - Hynix Semiconductor

부품명

상세내역

제조사

HMS87C4260

8-BIT SINGLE-CHIP MICROCONTROLLERS

Hynix Semiconductor 

HMS81C4x60

START / STOP condition detect

START / STOP condition is detected when Table 19-3 is

satisfied.

SCL

SDA (START)

SDA (STOP)

SCL release time

tSETUP

tHOLD

tSETUP : Setup time

tHOLD : Hold time

Figure 19-9 START / STOP condition detection timing

START / STOP detection time is showed Table 19-4.

ITEM

SCL release time

Setup time

Hold time

Timing SPEC.

> 2.0uS (n=12cycles)

> 1.0uS (n=6cycles)

> 1.0uS (n=6cycles)

Table 19-4 Example time ( fex=4MHz )

Address data communication

The first transmitted data from master is compared with

I2C address register (ICAR, 00D8H). At this time R/W is

not compared but it determines next data operation. i.e,

transmitting or receiving data

Master -> Slave (with 7bit address)

START Slave addr. ACK Data

7bit R/W

(“0”)

ACK Data ACK STOP

/ACK

Slave -> Master (with 7bit address)

START Slave addr. ACK Data

7bit R/W

(“1”)

ACK Data ACK STOP

Figure 19-10 Address data communication format

Data block from master to slave

Data block from slave to master

November 2001 Ver 1.1

89

Share Link: