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HYB39S64800 데이터 시트보기 (PDF) - Siemens AG
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HYB39S64800
64MBit Synchronous DRAM
Siemens AG
HYB39S64800 Datasheet PDF : 53 Pages
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Parameter
Refresh Cycle
Refresh Period
(4096 cycles)
Self Refresh Exit Time
Read Cycle
Data Out Hold Time
Data Out to Low Impedance Time
Data Out to High Impedance Time
DQM Data Out Disable Latency
Write Cycle
Data Input to Precharge
(write recovery)
DQM Write Mask Latency
HYB39S64400/800/160AT(L)
64MBit Synchronous DRAM
Symbol
Limit Values
Unit
-8
-8B
-10
min. max. min. max. min. max.
t
REF
t
SREX
– 64 – 64 – 64 ms
10 – 10 – 10 – ns
t
OH
3 – 3 – 3 – ns 2
t
LZ
0 – 0 – 0 – ns
t
HZ
3 8 3 10 3 10 ns
t
DQZ
– 2 – 2 – 2 CLK
t
WR
2 – 2 – 2 – CLK
t
DQW
0 – 0 – 0 – CLK
Semiconductor Group
17
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