LM337BD2TR4 데이터 시트보기 (PDF) - ON Semiconductor

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LM337BD2TR4

1.5 A, Adjustable Output, Negative Voltage Regulator

ON Semiconductor 

LM337

MAXIMUM RATINGS (TA = +25°C, unless otherwise noted)

Rating

Symbol

Value

Unit

Input−Output Voltage Differential

VI−VO

40

Vdc

Power Dissipation

Case 221A

TA = +25°C

Thermal Resistance, Junction−to−Ambient

Thermal Resistance, Junction−to−Case

Case 936 (D2PAK)

TA = +25°C

Thermal Resistance, Junction−to−Ambient

Thermal Resistance, Junction−to−Case

PD

Internally Limited

W

qJA

65

°C/W

qJC

5.0

°C/W

PD

Internally Limited

W

qJA

70

°C/W

qJC

5.0

°C/W

Operating Junction Temperature Range

TJ

−40 to +125

°C

Storage Temperature Range

Tstg

−65 to +150

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

ELECTRICAL CHARACTERISTICS (|VI−VO| = 5.0 V; IO = 0.5 A for T package; TJ = Tlow to Thigh [Note 1]; Imax and Pmax [Note 2].)

Characteristics

Figure Symbol Min Typ Max

Unit

Line Regulation (Note 3), TA = +25°C, 3.0 V ≤ |VI−VO| ≤ 40 V

Load Regulation (Note 3), TA = +25°C, 10 mA ≤ IO ≤ Imax

|VO| ≤ 5.0 V

|VO| ≥ 5.0 V

Thermal Regulation, TA = +25°C (Note 5), 10 ms Pulse

Adjustment Pin Current

Adjustment Pin Current Change, 2.5 V ≤ |VI−VO| ≤ 40 V,

10 mA ≤ IL ≤ Imax, PD ≤ Pmax, TA = +25°C

Reference Voltage, TA = +25°C, 3.0 V ≤ |VI−VO| ≤ 40 V,

10 mA ≤ IO ≤ Imax, PD ≤ Pmax, TJ = Tlow to Thigh

1

Regline

− 0.01 0.04

%/V

2

Regload

−

15

50

mV

−

0.3 1.0

% VO

Regtherm

− 0.003 0.04 % VO/W

3

IAdj

−

65 100

mA

1, 2

DIAdj

−

2.0 5.0

mA

3

Vref

−1.21 −1.25 −1.28

V

3

0

7

−1.20 −1.25 −1.30

Line Regulation (Note 3), 3.0 V ≤ |VI−VO| ≤ 40 V

Load Regulation (Note 3), 10 mA ≤ IO ≤ Imax

|VO| ≤ 5.0 V

|VO| ≥ 5.0 V

Temperature Stability (Tlow ≤ TJ ≤ Thigh)

Minimum Load Current to Maintain Regulation

(|VI−VO| ≤ 10 V)

(|VI−VO| ≤ 40 V)

Maximum Output Current

|VI−VO| ≤ 15 V, PD ≤ Pmax, T Package

|VI−VO| ≤ 40 V, PD ≤ Pmax, TJ = +25°C, T Package

RMS Noise, % of VO, TA = +25°C, 10 Hz ≤ f ≤ 10 kHz

Ripple Rejection, VO = −10 V, f = 120 Hz (Note 4)

Without CAdj

CAdj = 10 mF

Long−Term Stability, TJ = Thigh (Note 6), TA = +25°C for

Endpoint Measurements

1

Regline

− 0.02 0.07

%/V

2

Regload

−

20

70

mV

−

0.3 1.5

% VO

3

TS

−

0.6

−

% VO

3

ILmin

mA

−

1.5 6.0

−

2.5 10

3

Imax

A

−

1.5 2.2

− 0.15 0.4

N

− 0.003 −

% VO

4

RR

dB

−

60

−

66

77

−

3

S

−

0.3 1.0 %/1.0 k

Hrs.

Thermal Resistance, Junction−to−Case, T Package

RqJC

−

4.0

−

°C/W

1. Tlow to Thigh = 0° to +125°C, for LM337T, D2T. Tlow to Thigh = − 40° to +125°C, for LM337BT, BD2T.

2. Imax = 1.5 A, Pmax = 20 W

3. Load and line regulation are specified at constant junction temperature. Change in VO because of heating effects is covered under the

Thermal Regulation specification. Pulse testing with a low duty cycle is used.

4. CAdj, when used, is connected between the adjustment pin and ground.

5. Power dissipation within an IC voltage regulator produces a temperature gradient on the die, affecting individual IC components on the die.

These effects can be minimized by proper integrated circuit design and layout techniques. Thermal Regulation is the effect of these

temperature gradients on the output voltage and is expressed in percentage of output change per watt of power change in a specified time.

6. Since Long Term Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average

stability from lot to lot.

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